forked from M-Labs/artiq
| .. | ||
| kasli | ||
| kasli_drtioswitching | ||
| kasli_sawgmaster | ||
| kasli_suservo | ||
| kc705_nist_clock | ||
| metlino_sayma_ttl | ||
| no_hardware | ||
| sayma_master | ||
| artiq_ipython_notebook.ipynb | ||
| fit_image.py | ||
| README.rst | ||
| remote_exec_controller.py | ||
ARTIQ experiment examples ========================= This directory contains several sample ARTIQ master configurations and associated experiments that illustrate basic usage of various hardware and software features. New users might want to peruse the ``no_hardware`` directory to explore the argument/dataset machinery without needing access to hardware, and the ``kc705_nist_clock`` directory for inspiration on how to coordinate between host and FPGA core device code.