forked from M-Labs/artiq
02b8426f60
By analogy with libbuild_misoc. Hopefully one day it actually gets moved to misoc...
243 lines
6.2 KiB
Rust
243 lines
6.2 KiB
Rust
#![cfg_attr(not(has_timer1), allow(dead_code))]
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use core::mem;
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use core::fmt;
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use core::nonzero::NonZero;
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use alloc::Vec;
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use managed::ManagedMap;
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#[derive(Debug, Copy, Clone, PartialEq, Eq, PartialOrd, Ord)]
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pub struct Address(NonZero<usize>);
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impl Address {
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pub fn new(raw: usize) -> Option<Address> {
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NonZero::new(raw).map(Address)
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}
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pub fn as_raw(&self) -> usize {
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self.0.get()
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}
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}
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pub struct Profile {
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hits: Vec<Option<(Address, u32)>>,
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edges: Vec<Option<((Address, Address), u32)>>,
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}
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impl fmt::Debug for Profile {
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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write!(f, "Profile {{ hits: vec![...; {}], edges: vec![...; {}] }}",
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self.hits.len(), self.edges.len())
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}
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}
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impl Profile {
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pub fn new(hits_size: usize, edges_size: usize) -> Profile {
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let mut hits = vec![None; hits_size];
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hits.shrink_to_fit();
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let mut edges = vec![None; edges_size];
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edges.shrink_to_fit();
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Profile {
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hits: hits.into(),
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edges: edges.into(),
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}
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}
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pub fn overhead(&self) -> usize {
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let hit_size = mem::size_of::<Option<(Address, u32)>>();
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let edge_size = mem::size_of::<Option<(Address, u32)>>();
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self.hits.capacity() * hit_size +
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self.edges.capacity() * edge_size
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}
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pub fn hits<'a>(&'a mut self) -> ManagedMap<'a, Address, u32> {
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ManagedMap::Borrowed(&mut self.hits[..])
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}
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pub fn edges<'a>(&'a mut self) -> ManagedMap<'a, (Address, Address), u32> {
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ManagedMap::Borrowed(&mut self.edges[..])
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}
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pub fn record_hit(&mut self, addr: Address) -> Result<(), ()> {
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let mut hits = self.hits();
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match hits.get_mut(&addr) {
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Some(count) => *count = count.saturating_add(1),
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None => {
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if let Err(_) = hits.insert(addr, 1) {
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return Err(())
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}
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}
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}
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Ok(())
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}
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#[allow(dead_code)]
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pub fn record_edge(&mut self, caller: Address, callee: Address) -> Result<(), ()> {
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let mut edges = self.edges();
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match edges.get_mut(&(caller, callee)) {
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Some(count) => *count = count.saturating_add(1),
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None => {
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if let Err(_) = edges.insert((caller, callee), 1) {
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return Err(())
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}
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}
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}
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Ok(())
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}
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}
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#[cfg(has_timer1)]
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mod imp {
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use board_misoc::{csr, irq};
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use super::{Address, Profile};
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static mut PROFILE: Option<Profile> = None;
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mod lock {
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use core::ops::{Deref, DerefMut};
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use core::sync::atomic::{AtomicUsize, Ordering, ATOMIC_USIZE_INIT};
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static LOCKED: AtomicUsize = ATOMIC_USIZE_INIT;
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pub struct Lock;
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impl Lock {
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pub fn take() -> Result<Lock, ()> {
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if LOCKED.swap(1, Ordering::SeqCst) != 0 {
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Err(())
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} else {
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Ok(Lock)
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}
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}
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}
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impl Deref for Lock {
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type Target = Option<super::Profile>;
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fn deref(&self) -> &Option<super::Profile> {
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unsafe { &super::PROFILE }
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}
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}
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impl DerefMut for Lock {
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fn deref_mut(&mut self) -> &mut Option<super::Profile> {
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unsafe { &mut super::PROFILE }
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}
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}
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impl Drop for Lock {
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fn drop(&mut self) {
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LOCKED.store(0, Ordering::SeqCst)
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}
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}
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}
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use self::lock::Lock;
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pub fn start(interval_us: u64, hits_size: usize, edges_size: usize) -> Result<(), ()> {
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stop();
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let profile = Profile::new(hits_size, edges_size);
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info!("starting at {}us interval using {} heap bytes",
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interval_us, profile.overhead());
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*Lock::take().expect("cannot lock") = Some(profile);
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unsafe {
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let reload = csr::CONFIG_CLOCK_FREQUENCY as u64 * interval_us / 1_000_000;
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csr::timer1::load_write(reload);
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csr::timer1::reload_write(reload);
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csr::timer1::ev_pending_write(1);
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csr::timer1::ev_enable_write(1);
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irq::enable(csr::TIMER1_INTERRUPT);
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csr::timer1::en_write(1);
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}
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Ok(())
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}
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pub fn stop() {
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unsafe {
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if csr::timer1::en_read() == 0 || csr::timer1::ev_enable_read() == 0 {
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return
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}
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irq::disable(csr::TIMER1_INTERRUPT);
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csr::timer1::en_write(0);
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*Lock::take().expect("cannot lock") = None;
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info!("stopped");
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}
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}
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pub fn pause<F: FnOnce(Option<&mut Profile>) -> R, R>(f: F) -> R {
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unsafe {
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if csr::timer1::en_read() == 0 {
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return f(None)
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}
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irq::disable(csr::TIMER1_INTERRUPT);
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csr::timer1::en_write(0);
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let result = {
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let mut profile = Lock::take().expect("cannot lock");
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f(profile.as_mut())
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};
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irq::enable(csr::TIMER1_INTERRUPT);
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csr::timer1::en_write(1);
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result
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}
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}
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#[inline(always)] // make the top of backtrace predictable
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fn record(profile: &mut Profile, pc: usize) -> Result<(), ()> {
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let callee = Address::new(pc).expect("null code address");
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profile.record_hit(callee)?;
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// TODO: record edges
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Ok(())
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}
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#[inline(never)] // see above
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pub fn sample(pc: usize) {
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unsafe {
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csr::timer1::ev_pending_write(1);
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}
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let result = {
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let mut profile = Lock::take().expect("cannot lock");
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record(profile.as_mut().expect("profiler not running"), pc)
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};
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if result.is_err() {
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warn!("out of space");
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stop();
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}
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}
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}
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#[cfg(not(has_timer1))]
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mod imp {
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#![allow(dead_code)]
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pub fn start(_interval_us: u64, _hits_size: usize, _edges_size: usize) -> Result<(), ()> {
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error!("timer not available");
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Err(())
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}
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pub fn stop() {}
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pub fn pause<F: FnOnce(Option<&mut super::Profile>) -> R, R>(f: F) -> R {
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f(None)
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}
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pub fn sample(_pc: usize) {}
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}
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pub use self::imp::*;
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