whitequark
f4b7666768
coredevice.dds: reimplement fully in ARTIQ Python.
...
This commit also drops AD9858 support from software.
2016-11-21 15:13:26 +00:00
ad1049d59a
Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623 "
...
This reverts commit 4a62e09bd4
2016-11-20 21:35:07 +08:00
whitequark
30598720f4
Fix whitespace.
2016-11-20 09:50:00 +00:00
David Leibrandt
4a62e09bd4
gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623
2016-11-20 15:22:32 +08:00
99ad9b5917
add has_dds, use config flags
2016-11-08 23:33:03 +08:00
2392113bb6
kc705: use misoc clock for false path
2016-10-30 11:16:04 +08:00
c656a53532
kc705: clean up clock constraints
2016-10-29 21:28:01 +08:00
ed4d57c638
use new Migen signal attribute API
2016-10-29 21:19:58 +08:00
8280e72e90
gateware: use new misoc CSR mapping API
2016-09-24 20:48:37 +08:00
2bb90a4449
pipistrello: shrink a few more fifos
2016-09-21 02:29:05 +02:00
454b48df97
pipistrello: shrink fifos a bit more to relax pnr
2016-07-23 12:55:49 +02:00
8cb29fcb3b
targets/kc705: redefine user SMAs as 3.3V IO. Closes #502
2016-07-07 14:53:01 +08:00
dhslichter
141edb521a
qc2: swap SPI/TTL, all TTL lines are now In+Out compatible
2016-05-19 10:42:03 +08:00
9707981c07
targets/kc705: fix default -H option
2016-04-30 00:30:24 +08:00
dhslichter
f395a630e0
Updated qc2 pinouts for SPI and 2x DDS bus, update docs
2016-04-13 18:38:34 +08:00
ed1c368e73
gateware: name targets consistently. Closes #290
2016-04-05 16:07:29 +08:00
8f54a1e619
pipistrello: sys_clk 83 -> 75 MHz
...
This should close #341 once migen generates stable output.
2016-03-21 13:47:32 +01:00
0e1f75ec49
targets/kc705/qc2: hook up HPC backplane
2016-03-16 16:19:56 +08:00
f0b0b1bac7
support for multiple DDS buses (untested)
2016-03-09 17:12:50 +08:00
f33baf339f
pipistrello: drop ttls on pmod, add leds back in
2016-03-08 23:34:51 +01:00
f39208c95a
pipistrello: try with fewer leds/pmod ttl
2016-03-08 22:10:47 +01:00
0d431cb019
pipistrello: make pmod extension header, cleanup
2016-03-08 17:07:44 +01:00
a8fe3f50c3
pipistrello: grow fifos a bit (may make ise happier)
2016-03-08 16:17:37 +01:00
00d4775da5
pipistrello: shrink fifos a bit (may make ise happier)
2016-03-08 15:40:12 +01:00
9c11cda7dc
pipistrello: use ttl_simple for pmod[4:8]
2016-03-08 13:52:52 +01:00
104d641c59
pipistrello: move the spi channel like kc705
2016-03-08 13:30:05 +01:00
2180c5af7c
pipistrello: make pmod[4:8] available as ttls
2016-03-08 13:07:58 +01:00
e809e89571
pipistrello: adhere to pmod interface type 2 layout
2016-03-08 13:01:52 +01:00
e8b59b00f6
soc: use add_extra_software_packages, factor builder code
2016-03-07 00:18:47 +08:00
a8a74d7840
targets/kc705: enable I2C for all hardware adapters
2016-03-05 00:19:59 +08:00
7ff0c89d51
kc705.clock: add all spi buses
2016-03-04 00:03:48 +01:00
423ca03f3b
runtime: bit-banged i2c support (untested)
2016-03-03 17:46:42 +08:00
cfe72c72a2
gateware/kc705: add I2C GPIO core for QC2
2016-03-03 15:32:10 +08:00
a901971e58
gateware/soc: factor code to connect CSR device to kernel CPU
2016-03-03 15:12:15 +08:00
9af12230c8
soc: add timer to kernel CPU system
2016-03-03 13:19:17 +08:00
d3f36ce784
kc705: add false paths for ethernet phy
...
* vivado prefers rsys_clk over sys_clk (despite the assignment hierarchy)
(We need DONT_TOUCH and/or KEEP verilog annotations to fix this)
2016-03-02 19:56:24 +01:00
2cc1dfaee3
kc705: move ttl channels together again, update doc
2016-03-01 19:40:32 +01:00
f2ec8692c0
nist_clock: disable spi1/2
2016-03-01 01:52:46 +01:00
7ef21f03b9
nist_clock: add SPIMasters to spi buses
2016-02-29 22:19:39 +01:00
7ab7f7d75d
Merge branch 'master' into spimaster
...
* master:
artiq_flash: use term 'gateware'
targets/kc705-nist_clock: add clock generator on LA32 for testing purposes
doc: insist that output() must be called on TTLInOut. Closes #297
doc: update install instructions
coredevice: do not give up on UTF-8 errors in log. Closes #300
use m-labs setup for defaults
fix indentation
2016-02-29 20:47:52 +01:00
5fad570f5e
targets/kc705-nist_clock: add clock generator on LA32 for testing purposes
2016-03-01 00:35:26 +08:00
572c49f475
use m-labs setup for defaults
2016-02-29 21:35:23 +08:00
ad34927b0a
spi: RTIO_SPI_CHANNEL -> RTIO_FIRST_SPI_CHANNEL
2016-02-29 11:35:49 +01:00
8d7e92ebae
pipistrello: set RTIO_SPI_CHANNEL
2016-02-29 00:37:00 +01:00
d5893d15fb
gateware.kc705: make xadc/ams an extension header
2016-02-28 22:41:17 +01:00
312e09150e
kc705/clock: add spi bus for dac on ams101
2016-02-28 21:17:53 +01:00
ade3eda19a
gateware.pipistrello: use pmod for spi
2016-02-27 11:29:40 +01:00
fb929c8599
gateware/spi: stubs
2016-02-26 13:11:10 +01:00
a8545fc1f7
targets/kc705: set up user_sma_gpio_n like other TTLs
2016-02-22 22:35:15 +08:00
4946a53456
Revert "targets/kc705: pre-divide input RTIO clock to improve non-50% duty cycle tolerance"
...
This reverts commit 04b0db1a91
2016-02-22 17:52:40 +08:00
