Commit Graph

800 Commits

Author SHA1 Message Date
Etienne Wodey
d433f6e86d coredevice: adf5355: more general PLL parameters calculation
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
b856df7c35 coredevice: adf5355: cleanup, style 2020-11-10 10:49:22 +08:00
Etienne Wodey
211500089f coredevice: mirny/adf5355: add basic high-level interface
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
David Nadlinger
4f311e7448 compiler: Raise exception on failed assert()s rather than panic
This allows assert() to be used on Zynq, where abort() is not
currently implemented for kernels. Furthermore, this is arguably
the more natural implementation of assertions on all kernel targets
(i.e. where embedding into host Python is used), as it matches host
Python behavior, and the exception information actually makes it to
the user rather than leading to a ConnectionClosed error.

Since this does not implement printing of the subexpressions, I
left the old print+abort implementation as default for the time
being.

The lit/integration/instance.py diff isn't just a spurious change;
the exception-based assert implementation exposes a limitation in
the existing closure lifetime tracking algorithm (which is not
supposed to be what is tested there).

GitHub: Fixes #1539.
2020-11-10 00:51:24 +01:00
Etienne Wodey
ecef5661ce coredevice/phaser: fix typos in docstring
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-10-29 20:27:08 +01:00
eecd97ce4c phaser: debug and comments 2020-09-27 17:15:16 +00:00
c453c24fb0 phaser: tweak slacks 2020-09-26 21:16:08 +00:00
6c8bddcf8d phaser: tune sync_dly 2020-09-26 21:13:00 +00:00
569e5e56cd phaser: autotune and fix fifo_offset 2020-09-26 20:37:16 +00:00
2fba3cfc78 phaser: debug init, systematic bring-up 2020-09-25 20:54:59 +00:00
fec2f8b763 phaser: increase slack for iotest 2020-09-24 10:59:22 +00:00
6e6480ec21 phaser: tweak slacks and errors, identify trf 2020-09-24 08:38:30 +00:00
03d5f985f8 phaser: another artiq-python signed integer quirk 2020-09-23 15:40:54 +00:00
ef65ee18bd dac34h84: unflip spectrum, clear nco 2020-09-23 08:35:56 +00:00
50b4eb4840 Merge branch 'master' into phaser
* master: (26 commits)
  fastino: documentation and eem pass-through
  kasli2: forward sma_clkin to si5324
  test: relax test_dma_playback_time on Zynq
  rpc: fixed _write_bool
  fastino: document/cleanup
  build_soc: remove assertion that was used for test runs
  metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516)
  Revert "test: temporarily disable test_async_throughput"
  build_soc: rename identifier_str to gateware_identifier_str
  test: relax loopback gate timing
  test: temporarily disable test_async_throughput
  test: relax test_pulse_rate on Zynq
  test: skip NonexistentI2CBus if I2C is not supported
  build_soc: override identifier_str only for gateware
  examples: add Metlino master, Sayma satellite with TTLOuts via FMC
  sayma_amc: add support for 4x DIO output channels via FMC
  fmcdio_vhdci_eem: fix pin naming
  build_soc: add identifier_str override option
  RPC: optimization by caching
  test: improved test_performance
  ...
2020-09-22 16:02:25 +00:00
c55f2222dc fastino: documentation and eem pass-through
* Repeat information about matching log2_width a few times
  in the hope that people read it. #1518
* Pass through log2_width in kasli_generic json. close #1481
* Check DAC value range. #1518
2020-09-22 17:58:53 +02:00
85d16e3e5f phaser: tweaks 2020-09-22 15:27:38 +00:00
fd5e221898 phaser: dac and trf register maps, init code 2020-09-22 14:08:39 +00:00
3e036e365a phaser: nco, settings and init tweaks 2020-09-22 09:52:49 +00:00
fdb2867757 phaser: fewer iotest patterns 2020-09-21 17:06:26 +02:00
d730851397 phaser: elaborate init sequence, more tests 2020-09-21 15:05:29 +00:00
f0959fb871 phaser: iotest early, check_alarms 2020-09-17 14:13:58 +00:00
b15e388b5f ad53xx: distinguish errors 2020-09-17 14:13:10 +00:00
c18f515bf9 phaser: rework rtio channels, sync_dly, init() 2020-09-16 12:23:07 +00:00
f3b0398720 phaser: n=2, m=16, sync_dly 2020-09-16 09:19:15 +00:00
9b58b712a6 phaser: doc tweaks 2020-09-15 12:35:26 +00:00
ff57813a9c phaser: init [wip] 2020-09-15 08:46:47 +00:00
07418258ae phaser: init [wip] 2020-09-15 08:46:10 +00:00
3a79ef740b phaser: work around integer size 2020-09-15 08:46:10 +00:00
b449e7202b phaser: rework docs 2020-09-15 08:46:10 +00:00
b619f657b9 phaser: doc tweaks 2020-09-12 19:59:49 +02:00
c3728678d6 phaser: document, elaborate comments, some fixes 2020-09-12 17:35:14 +00:00
e505dfed5b phaser: refactor coredevice driver 2020-09-12 14:17:40 +00:00
fdd2d6f2fb phaser: SI methods 2020-09-12 11:02:37 +00:00
e69bb0aeb3 phaser: add comment about get_dac_data 2020-09-07 16:06:16 +00:00
6195b1d3a0 rpc: fixed _write_bool
Closes #1519
2020-09-04 13:49:22 +08:00
56aa22caeb fastino: document/cleanup
* added documentation on `update`/`hold` mechanism
* mask machine unit values
* cleanup coredevice driver

close #1518
2020-09-03 17:44:26 +02:00
272dc5d36a phaser: documentation 2020-08-28 16:36:44 +00:00
b2572003ac RPC: optimization by caching
This reduced the calls needed for socket send/recv.
2020-08-28 14:58:34 +08:00
7cf974a6a7 comm_kernel: fix typo 2020-08-28 12:25:23 +08:00
68bfa04abb phaser: trf readback strobe spi changes 2020-08-27 15:31:42 +00:00
c10ac2c92a phaser: add trf, duc, interfaces, redo body assembly, use more natrual iq ordering (i lsb) 2020-08-27 14:26:09 +00:00
e5e2392240 phaser: wire up multidds 2020-08-26 17:12:41 +00:00
d1be1212ab phaser: coredevice shim, dds [wip] 2020-08-26 15:10:50 +00:00
7181ff66a6 compiler: improved rpc performance for list and array
1. Removed duplicated tags before each elements.
2. Use numpy functions to speedup parsing.
2020-08-26 14:17:06 +08:00
20fcfd95e9 phaser: coredevice shim, readback fix 2020-08-24 15:46:31 +00:00
David Nadlinger
8783ba2072 compiler/firmware: RPCs for ndarrays 2020-08-09 17:08:43 +01:00
David Nadlinger
9af6e5747d compiler: Factor rpc_tag() out of llvm_ir_generator 2020-08-09 03:54:41 +01:00
pmldrmota
1df62862cd
AD9910: Write correct number of bits to POW register (#1498)
* coredevice.ad9910: Add return type hints to conversion functions

* coredevice.ad9910: Make set_pow write correct number of bits
The AD9910 expects 16 bits. Thus, if writing 32 bits to the POW register, the chip would likely enter a locked-up state.

* coredevice.ad9910: Correct data alignment in write_16

Co-authored-by: Robert Jördens <rj@quartiq.de>

* coredevice.ad9910: Add function to read from 16 bit registers

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-08-07 10:10:44 +02:00
2a2f5c4d58 comm_analyzer: make header error flag more general 2020-07-20 19:39:19 +08:00
charlesbaynham
2429a266f6
ad9912: Fix typing problem on ad9912 (#1466)
Closes #1463

FTW and phase word were ambiguously typed, resulting in failure to compile
2020-06-16 20:17:22 +02:00
9822b88d9b
ad9910: fix asf range (#1450)
* ad9910: fix asf range

The ASF is a 14-bit word. The highest possible value is 0x3fff, not
0x3ffe. `int(round(1.0 * 0x3fff)) == 0x3fff`.

I don't remember and understand why this was 0x3ffe since the beginning.
0x3fff was already used as a default in `set_mu()`

Signed-off-by: Robert Jördens <rj@quartiq.de>

* RELEASE_NOTES: ad9910 asf scale change

Co-authored-by: David Nadlinger <code@klickverbot.at>
2020-05-29 11:13:26 +02:00
2538840756
Coredevice Input Validation (#1447)
* Input validation and masking of SI -> mu conversions (close #1446)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Update RELEASE_NOTES

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-05-17 15:09:11 +02:00
b3b6cb8efe
ad53xx improvements (#1445)
* ad53xx: voltage_to_mu() validation & documentation (closes #1443, #1444)
The voltage input (float) is checked for validity. If we need more
speed, we may want to check the DAC-code for over/underflow instead.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx documentation: voltage_to_mu is only valid for 16-bit DACs

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: add voltage_to_mu method (closes #1341)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: improve voltage_to_mu performance
Interger comparison is faster than floating point math.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: voltage_to_mu method now uses attribute values

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Fixup RELEASE_NOTES.rst

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: documentation improvements

voltage_to_mu return value
14-bit DAC support

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2020-05-08 19:23:43 +02:00
e8b73876ab comm_kernel: add Zynq runtime identifier 2020-04-12 17:25:14 +08:00
de57039e6e comm_kernel: cleanup 2020-04-12 16:02:36 +08:00
9dc24f255e comm_kernel: remove dead code 2020-04-12 15:06:46 +08:00
e803830b3b fastino: support wide RTIO interface and channel groups 2020-03-05 17:55:04 +00:00
8451e58fbe ad9912: fix ftw width docstring 2020-02-27 02:11:12 +08:00
248230a89e fastino: style 2020-01-20 13:25:00 +01:00
c45a872cba fastino: fix init, set_cfg 2020-01-20 13:25:00 +01:00
2c4e5bfee4 fastino: add [WIP] 2020-01-20 13:25:00 +01:00
e427aaaa66 basemod_att: fix imports 2020-01-20 20:14:24 +08:00
7ab0282234 adf5355: style 2020-01-20 13:13:08 +01:00
9368c26d1c mirny: add to manual 2020-01-20 13:13:08 +01:00
01a6e77d89 mirny: add
* This targets unrelease CPLD gateware (https://github.com/quartiq/mirny/issues/1)
* includes initial coredevice driver, eem shims, and kasli_generic tooling
* addresses the ARTIQ side of #1130
* Register abstraction to be written

Signed-off-by: Robert Jördens <rj@quartiq.de>
2020-01-20 13:13:08 +01:00
833f428391 sayma: fix hmc542 to/from mu 2020-01-16 09:10:32 +08:00
David Nadlinger
1e864b7e2d coredevice/suservo: Add separate methods for setting only the IIR offset 2019-12-30 20:02:22 +00:00
b5e1bd3fa2 coredevice: simplify/cleanup network connection code
This removes:
* host-side keepalive, which turns out not to be required
* custom connection timeout (the default is OK)
* SSH tunneling support (doesn't seem to be actually used anywhere)
2019-12-23 19:53:49 +08:00
David Nadlinger
af31c6ea21 coredevice: Don't use is to compare with integer literal
This works on CPython, but is not guaranteed to do so, and
produces a warning since 3.8 (see https://bugs.python.org/issue34850).
2019-12-22 05:46:41 +00:00
fb2076a026 basemod_att: add dB functions, document 2019-12-21 14:56:41 +08:00
d4e039cede basemod: add coredevice driver 2019-12-21 14:18:10 +08:00
8759c8d360 shiftreg: fix get method 2019-12-21 14:17:22 +08:00
cab8c8249e coredevice/shiftreg: add get method 2019-12-20 18:58:50 +08:00
gthickman
56d4b70e01 ad9910 osk (#1387)
* updated adoo10.py for RAM mode frequency control

* updated docstrings for set_cfr1() in ad9910.py

* fixed typo in ad9910.py

* added docstrings to ad9910.py

* removed OSK-related changes in AD9910, to be included in a separate branch.

* updated AD9910 set_cfr1 for control of OSK mode parameters

* updated AD9910 set_cfr1() for control of OSK mode parameters.
2019-11-18 15:57:26 +01:00
Fabian Schmid
f73e2a3d30 doc: clarify urukul attenuator behavior
Closes #1386

Signed-off-by: Fabian Schmid <fabian.schmid@mpq.mpg.de>
2019-11-18 15:56:00 +01:00
Garrett
f8a7e278b8 removed OSK-related changes in AD9910, to be included in a separate branch. 2019-11-12 19:07:05 +01:00
Garrett
3a19ba7e62 added docstrings to ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
4ad3651022 fixed typo in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
6d34eb3bb0 updated docstrings for set_cfr1() in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
61ca46ec3f updated adoo10.py for RAM mode frequency control 2019-11-12 19:07:05 +01:00
5279bc275a urukul: rework EEPROM synchronization. Closes #1372 2019-11-05 18:56:10 +08:00
1f15e55021 comm_analyzer: don't assume every message has data
close #1377
2019-10-28 15:35:44 +01:00
a8f85860c4 coreanalyzer: AD9914 fixes (#1376) 2019-10-17 07:29:33 +08:00
Tim Ballance
ada3b39f4e Fix ad9910 ram mode asf scale error in polar mode 2019-10-04 20:14:41 +02:00
Tim Ballance
448080e71d Fix ad9910 ram mode asf scale error
RAM mode amplitude to ASF conversion should be << 18 rather than << 16
2019-10-04 20:14:41 +02:00
98cd9a539c compiler: support Cortex A9 target 2019-08-26 10:46:22 +08:00
David Nadlinger
99e490f9ff coredevice/suservo: Slightly reword get_adc[_mu]() docstring for clarity
This hopefully suggests a bit better that the value is the last one
fetched by the servo (i.e. needs the servo active to update), rather
than somehow requesting a new sample to be taken.
2019-07-30 12:22:08 +01:00
b8870997d0 doc: clarify TTL direction control with buffered cards 2019-07-24 10:04:45 +08:00
David Nadlinger
280915d54f coredevice/suservo: Adjust T_CYCLE to match gateware
See GitHub #1338.
2019-07-17 00:20:22 +01:00
f7e10759dc suservo: note requirement to stop servo when accessing state
As already mentioned in the gateware.

One alternative would be to detect address collisions and
stall the read for one cycle.

Note that there will in general not be a consistent view of the servo
state unless the servo is stopped.

close #1337
2019-07-08 18:37:42 +02:00
David Nadlinger
8bf9640185 coredevice/suservo: Fix output IIR state width in docstring 2019-06-21 11:27:39 +02:00
David Nadlinger
34f48f57cc coredevice/suservo: Fix {get,set}_y_mu() scaling
Previously, Channel.set_y(1) would set the output to -1 instead.
2019-06-21 11:27:39 +02:00
74e4b01201 urukul: document consequences of incorrect CPLD clock settings 2019-06-11 11:12:12 +08:00
adf3df2bb5 suservo coredevice driver: mask ftw to avoid erroneous sign extension 2019-06-03 21:40:04 +02:00
David Nadlinger
fc95183e04 coredevice: Fix host-side serialization of (nested) lists
Test case to follow.
2019-03-31 17:10:27 +01:00
d07c6fcfea ad9910: handle unprogrammed EEPROM and numpy corner cases 2019-03-22 14:28:47 +08:00
04e0c23e78 ad9910: support reading synchronization values from EEPROM 2019-03-13 15:34:47 +08:00
964a349a19 add Kasli I2C driver 2019-03-13 15:33:50 +08:00
227c729f56 fix permissions 2019-03-11 20:43:28 +08:00