b8870997d0
doc: clarify TTL direction control with buffered cards
2019-07-24 10:04:45 +08:00
David Nadlinger
48fc175a6b
coredevice.ttl: More imperative mood in docstrings [nfc]
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This follows Python conventions (PEP257) and unifies the style with
other comments.
2019-01-12 12:01:55 +00:00
53e79f553f
Merge branch 'master' into new
2018-11-19 11:54:50 +08:00
69e699c7bd
ttl: compensate for SED latency in input gating
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Closes #1137
2018-11-17 22:10:20 +08:00
8caea0e6d3
gateware,runtime: optimize RTIO kernel interface further
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* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
2018-11-08 18:29:24 +08:00
fae95e73ad
ttl: use optimized rtio_output API
2018-11-07 23:41:43 +08:00
31f68ddf6c
Merge branch 'urukul-sync'
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* urukul-sync: (29 commits)
urukul: flake8 [nfc]
ad9910: flake8 [nfc]
urukul/ad9910 test: remove unused import
test_urukul: relax speed
urukul,ad9910: print speed metrics
kasli: add PTB2 (external clock and SYNC)
kasli: add sync to LUH, HUB, Opticlock
kasli_tester: urukul0 mmcx clock defunct
test_ad9910: relax ifc mode read
tests: add Urukul-AD9910 HITL unittests including SYNC
ad9910: add init bit explanation
test: add Urukul CPLD HITL tests
ad9910: fiducial timestamp for tracking phase mode
ad9910: add phase modes
ad9910: fix pll timeout loop
tester: add urukul sync
ptb: back out urukul-sync
ad9910: add IO_UPDATE alignment and tuning
urukul: set up sync_in generator
ad9910: add io_update alignment measurement
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close #1143
2018-11-05 19:54:30 +01:00
f62c1ff0bb
TTLClockGen: expose acc_width
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:27 +01:00
David Nadlinger
f79b9d9e1e
ttl: Expand input gate/count API docstrings
2018-11-03 20:33:19 +08:00
David Nadlinger
cbdef0225c
ttl: Add target RTIO time argument to timestamp/count functions
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Software-based tracking of timestamps is problematic (e.g. when
using DMA, see GitHub #1113 ).
2018-11-03 20:33:19 +08:00
David Nadlinger
2a0e1dabfb
ttl: Remove unused attribute [nfc]
2018-11-03 20:33:19 +08:00
David Nadlinger
17a5fb2dce
ttl: Remove error-prone sync() calls
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These methods are problematic, as with DMA in the picture, the
timestamp member variables did not necessarily reflect the last
submitted event timestamp (see GitHub #1113 ).
sync() is only very rarely used in typical experimental code, so
the methods are removed without a transition period.
Core.wait_until() can be used to busy-wait for a specified RTIO
timestamp value on the core device CPU instead.
2018-11-03 20:33:19 +08:00
David Nadlinger
cbfbe24d7a
ttl: Remove broken TTLClockGen.sync
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The code currently doesn't compile because of a typo in the timestamp
field name. However, tracking event timestamps in software is
problematic anyway (e.g. with DMA, see GitHub #1113 ), so just remove
`sync()` altogether.
2018-11-03 20:33:19 +08:00
c71e442929
documentation improvements
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Based on PR #1101 by @drewrisinger
2018-09-26 12:12:37 +08:00
d0b21a8e85
manual: add short description of drivers, with replace support information. Closes #777
2017-07-20 12:01:29 +08:00
2b282456dc
coredevice/ttl: fix imports
2016-09-07 17:37:14 +08:00
486fe97649
ttl: add level-based APIs ( #218 )
2016-09-07 16:55:21 +08:00
whitequark
906db876a6
language: replace coredevice int with numpy.{int32,int64}.
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Fixes #453 .
2016-07-06 04:44:21 +00:00
3aab77d7a0
doc: precisions about time cursor interaction
2016-06-12 13:08:47 +08:00
whitequark
9cc9e8b276
embedding: s/kernel_constant_attributes/kernel_invariants/g
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Requested in #359 .
2016-04-06 22:38:31 +00:00
whitequark
712e16b79e
ttl: mark constant attributes for TTL{In,InOut,ClockGen}.
2016-04-02 18:20:51 +00:00
9d1903a4e2
coredevice/i2c,ttl,spi: consistent device get
2016-03-09 13:01:34 +08:00
3364827744
ttl/TTLClockGen: fix FTW computation with ref_multiplier != 1
2016-03-04 16:59:59 +08:00
whitequark
6e44c5424d
coredevice.ttl: add missed int64 conversion.
2016-03-04 08:37:43 +00:00
f754d2c117
Merge branch 'spimaster'
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* spimaster: (52 commits)
runtime/rtio: rtio_process_exceptional_status() has only one user
coredevice.spi, doc/manual: add spi
kc705: move ttl channels together again, update doc
runtime: rt2wb_input -> rtio_input_data
examples/tdr: adapt to compiler changes
bridge: really fix O/OE
runtime: define constants for ttl addresses
coredevice.ttl: fix sensitivity
bridge: fix ttl o/oe addresses
runtime: refactor ttl*()
rtio: rm rtio_write_and_process_status
coredevice.spi: unused import
rt2wb, exceptions: remove RTIOTimeout
gateware.spi: delay only writes to data register, update doc
nist_clock: disable spi1/2
runtime/rt2wb: use input/output terminology and add (async) input
examples: update device_db for nist_clock spi
gateware.spi: rework wb bus sequence
nist_clock: rename spi*.ce to spi*.cs_n
nist_clock: add SPIMasters to spi buses
...
2016-03-01 22:08:08 +01:00
3aebbbdb61
coredevice.ttl: fix sensitivity
2016-03-01 18:22:03 +01:00
8adef12781
runtime: refactor ttl*()
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* remove rt2wb_output
* remove ttl_*() ttl.c ttl.h
* use rtio_output() and rtio_input_timestamp()
* adapt coredevice/compiler layer
* adapt bridge to not artiq_raise_from_c()
2016-03-01 16:36:59 +01:00
c7d48a1765
coredevice/TTLOut: add dummy output function
2016-03-01 19:03:10 +08:00
a1e1f2b387
doc: insist that output() must be called on TTLInOut. Closes #297
2016-03-01 00:28:40 +08:00
whitequark
3e1348a084
Merge branch 'master' of github.com:m-labs/artiq into new-py2llvm
2015-09-27 18:22:28 +03:00
whitequark
9605e8215f
coredevice.ttl: update for new int semantics.
2015-08-28 02:11:26 -05:00
1991b3c910
coredevice/TTLClockGen: fix attribute init
2015-08-27 09:48:11 +08:00
c625f2e7c9
ttl: minor docstring cleanup
2015-08-17 23:50:24 +08:00
f073dfaee5
ttl: add input/output doc
2015-08-13 12:20:12 +08:00
whitequark
c72267ecf5
Implement syscalls for the new compiler.
2015-08-10 20:26:06 +03:00
90368415a6
ttl: remove timestamp function
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The general idea is that functions that work with absolute timestamps exist only in machine units versions, to help prevent floating point losses of precision. Time differences should be computed in machine units and then converted, e.g. mu_to_seconds(t2-t1).
This function would have had problems after ~50 days of running the device.
2015-07-29 11:11:16 +08:00
5f5227f01f
ttl: add timestamp()
2015-07-28 16:20:05 -06:00
e95b66f114
ttl: remove spurious _mu
2015-07-28 16:20:05 -06:00
56fc7a484c
TTLInOut: timestamp -> timestamp_mu
2015-07-13 23:21:29 +02:00
32d141f5ac
refactor ddb/pdb/rdb
2015-07-13 22:21:32 +02:00
58c0150822
ttl: improve clockgen doc
2015-07-05 19:07:13 +02:00
65ec6c28f4
ttl/clockgen: expose acc_width
2015-07-04 19:21:25 +02:00
753d61b38f
complete support for TTL clock generator
2015-07-04 18:36:01 +02:00
9d6287a6a3
expose machine units to user
2015-07-01 22:22:53 +02:00
53c6339307
runtime: break ttl-specific functions from rtio
2015-05-08 16:20:12 +08:00
65b4b7bb12
coredevice: rename rtio to ttl, integrated in+out driver, loopback on the same pin in tests
2015-05-02 10:35:21 +08:00
