srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity
1,518 Commits 63 Branches 34 Tags 19 MiB
Commit Graph

1518 Commits

Author SHA1 Message Date
whitequark 224a93fde3 Make compiler.ir.BasicBlock.predecessors much faster. 2015-07-18 20:48:11 +03:00
Sebastien Bourdeauducq deaa492566 language: add scan iterators 2015-07-18 19:26:41 +02:00
Sebastien Bourdeauducq 9e29a4650a environment,gui: more argument types 2015-07-18 16:25:08 +02:00
Sebastien Bourdeauducq 5f95a302e6 environment: improve docstrings 2015-07-18 16:24:37 +02:00
Sebastien Bourdeauducq 657f198cdc gui: display '---' on failed number result 2015-07-18 10:26:47 +02:00
whitequark 47cbadb564 Revert "Ensure bindings are created in correct order for e.g. "x, y = y, x"." 
This reverts commit bcd1832203.

The bindings are actually created in lexical order, as evident
in e.g. "x = lambda: x". The safety provided by this check should
be instead provided by a local access analysis.
 2015-07-18 09:54:11 +03:00
whitequark 8e1cc8d985 Add an explicit ARTIQ IR instruction to create a closure. 2015-07-18 09:27:34 +03:00
whitequark 5ad02d5282 Fix ARTIQ IR generation for variables declared global. 2015-07-18 09:10:41 +03:00
whitequark 21eafefd28 Fix inference for globals. 2015-07-18 08:13:49 +03:00
whitequark 0d66bdfbf8 Fix For miscompilation. 2015-07-18 07:58:43 +03:00
whitequark dde2e67c3f Add source locations to ARTIQ IR instructions. 2015-07-18 07:49:42 +03:00
whitequark 255ffec483 Generate more compact ARTIQ IR for else-less if. 2015-07-18 07:49:27 +03:00
Sebastien Bourdeauducq dd7920f0c3 gui: basic argument support 2015-07-17 21:28:46 +02:00
whitequark e96bc3c36c Add complete IR generator. 2015-07-17 21:29:06 +03:00
Sebastien Bourdeauducq 2576036ba1 language,worker: preserve order of arguments 2015-07-17 19:32:38 +02:00
Sebastien Bourdeauducq 6b36d93cc2 master,client: support repository rescan 2015-07-17 18:55:48 +02:00
Sebastien Bourdeauducq 4907991ea3 sync_struct: docstring cleanup 2015-07-17 18:53:43 +02:00
whitequark f28549a11a Add builtins.is_exception. 2015-07-17 16:05:02 +03:00
whitequark 3b661b2b65 Fix environment corruption by ExceptHandler without a name. 2015-07-17 16:04:46 +03:00
Sebastien Bourdeauducq 39c6bc940c coreconfig: use new database API (closes #75) 2015-07-17 10:49:55 +02:00
Sebastien Bourdeauducq 9649e1837a gui: basic plotting 2015-07-16 20:52:53 +02:00
Sebastien Bourdeauducq a83473a19a sync_struct: clarify notify_cb doc 2015-07-16 20:52:27 +02:00
Yann Sionneau 78ee4bdb99 pyqtgraph: use more up to date revision a6d5e28 on develop branch 2015-07-16 20:00:08 +02:00
whitequark 2dcb744519 Fix inference for default arguments. 2015-07-16 17:26:31 +03:00
whitequark f8e51e07d5 Add zero/one accessors to TBool, TInt, TFloat. 2015-07-16 16:03:24 +03:00
whitequark bcd1832203 Ensure bindings are created in correct order for e.g. "x, y = y, x". 2015-07-16 15:59:59 +03:00
whitequark 5756cfcebc Correctly infer type of list(iterable). 2015-07-16 15:35:46 +03:00
whitequark 6cda67c0c6 Ensure type comparisons see through type variables. 2015-07-16 14:59:05 +03:00
whitequark c1e7a82e97 Add IndexError and ValueError builtins. 2015-07-16 14:58:40 +03:00
whitequark b58fa9067d Add attributes to TRange. 
Also make attributes an OrderedDict, for stable order during
LLVM IR generation.
 2015-07-16 14:57:44 +03:00
whitequark a6950bf11d Move builtin.is_{builtin,exn_constructor} to types. 2015-07-16 14:56:39 +03:00
whitequark 5000f87dfc Rename the field of CoerceT from expr to value. 2015-07-16 14:55:23 +03:00
whitequark e9416f4707 Convert Slice into typed SliceT. 2015-07-16 14:54:04 +03:00
whitequark 53fb03d1bf Restrict comprehensions to single for and no if clauses. 2015-07-16 14:52:41 +03:00
whitequark 227f97f8a3 Add inference for Index, Slice and ExtSlice. 2015-07-16 04:22:41 +03:00
Sebastien Bourdeauducq 66940ea815 rtio: disable NOP suppression after reset and underflow 2015-07-15 20:54:55 +02:00
Yann Sionneau 08eec40861 manual: building LLVM as shared libraries is not recommended on Linux and not supported on Windows 2015-07-15 17:34:06 +02:00
Yann Sionneau 774c66a209 manual: also build LLVM native target (needed for py2llvm test) 2015-07-15 17:32:32 +02:00
Yann Sionneau fa4f38b871 manual: add missing llvmlite patches 2015-07-15 17:31:57 +02:00
Yann Sionneau 511d51977e llvmlite: split patch to be cleaner. close #72 2015-07-15 17:28:05 +02:00
Yann Sionneau af20efafa5 conda: update llvmlite-or1k package and up the build number 2015-07-15 17:28:05 +02:00
Sebastien Bourdeauducq f836465585 coredevice: environment -> runtime 2015-07-15 11:20:41 +02:00
Sebastien Bourdeauducq 84de2fb28b expid: experiment -> class_name 2015-07-15 11:08:12 +02:00
Sebastien Bourdeauducq 255aba9247 test/worker: remove stale handler 2015-07-15 11:07:48 +02:00
Sebastien Bourdeauducq 7de56666e3 worker,environment: support scanning of arguments with no default 2015-07-15 10:59:48 +02:00
Sebastien Bourdeauducq 9ed4dcd7d1 repository: load experiments in worker, list arguments 2015-07-15 10:54:44 +02:00
whitequark c724e024ce Fix inference for multiple-target assignments. 2015-07-15 06:33:44 +03:00
Sebastien Bourdeauducq 7770ab64f2 worker: factor timeouts 2015-07-14 23:43:08 +02:00
whitequark 9ff9f85f19 Add accessors to instructions. 2015-07-14 22:18:38 +03:00
Sebastien Bourdeauducq a07f2473b0 manual: add core device moninj port 2015-07-14 20:06:29 +02:00