669fbaa4f1
ad53xx->ad5360 and refactor
2016-03-04 00:00:25 +01:00
dc6d116824
spi: have write() delay by transfer duration
2016-03-03 21:57:27 +01:00
9969cd85de
ad53xx: ldac may be none
2016-03-02 15:50:02 +01:00
1e4bccae20
ad53xx: add
2016-03-02 00:12:01 +01:00
162ecdd574
spi: cleanup, add frequency_to_div()
2016-03-02 00:11:17 +01:00
d973eb879f
coredevice.spi: docstring fix
2016-03-01 22:42:00 +01:00
f754d2c117
Merge branch 'spimaster'
...
* spimaster: (52 commits)
runtime/rtio: rtio_process_exceptional_status() has only one user
coredevice.spi, doc/manual: add spi
kc705: move ttl channels together again, update doc
runtime: rt2wb_input -> rtio_input_data
examples/tdr: adapt to compiler changes
bridge: really fix O/OE
runtime: define constants for ttl addresses
coredevice.ttl: fix sensitivity
bridge: fix ttl o/oe addresses
runtime: refactor ttl*()
rtio: rm rtio_write_and_process_status
coredevice.spi: unused import
rt2wb, exceptions: remove RTIOTimeout
gateware.spi: delay only writes to data register, update doc
nist_clock: disable spi1/2
runtime/rt2wb: use input/output terminology and add (async) input
examples: update device_db for nist_clock spi
gateware.spi: rework wb bus sequence
nist_clock: rename spi*.ce to spi*.cs_n
nist_clock: add SPIMasters to spi buses
...
2016-03-01 22:08:08 +01:00
0456169558
coredevice.spi, doc/manual: add spi
2016-03-01 21:29:09 +01:00
f30dc4b39e
runtime: rt2wb_input -> rtio_input_data
2016-03-01 19:22:42 +01:00
3aebbbdb61
coredevice.ttl: fix sensitivity
2016-03-01 18:22:03 +01:00
8adef12781
runtime: refactor ttl*()
...
* remove rt2wb_output
* remove ttl_*() ttl.c ttl.h
* use rtio_output() and rtio_input_timestamp()
* adapt coredevice/compiler layer
* adapt bridge to not artiq_raise_from_c()
2016-03-01 16:36:59 +01:00
29776fae3f
coredevice.spi: unused import
2016-03-01 15:38:40 +01:00
324660ab40
rt2wb, exceptions: remove RTIOTimeout
...
Assume that rt2wb transactions either collide and are then
reported (https://github.com/m-labs/artiq/issues/308 ) or that
they complete and the delay with which they complete does not matter.
If a transaction is ack'ed with a delay because the WB core's downstream
logic is busy, that may lead to a later collision with another WB
transaction.
2016-03-01 14:44:07 +01:00
c7d48a1765
coredevice/TTLOut: add dummy output function
2016-03-01 19:03:10 +08:00
7d7a710a56
runtime/rt2wb: use input/output terminology and add (async) input
2016-03-01 00:35:56 +01:00
7ab7f7d75d
Merge branch 'master' into spimaster
...
* master:
artiq_flash: use term 'gateware'
targets/kc705-nist_clock: add clock generator on LA32 for testing purposes
doc: insist that output() must be called on TTLInOut. Closes #297
doc: update install instructions
coredevice: do not give up on UTF-8 errors in log. Closes #300
use m-labs setup for defaults
fix indentation
2016-02-29 20:47:52 +01:00
6c899e6ba6
runtime/rtio: fix rtio_input_wait(), add RTIOTimeout
2016-02-29 19:49:15 +01:00
16537d347e
coredevice.spi: cleanup
2016-02-29 19:48:26 +01:00
e11366869d
coredevice/spi: clean up api
2016-02-29 17:54:42 +01:00
a1e1f2b387
doc: insist that output() must be called on TTLInOut. Closes #297
2016-03-01 00:28:40 +08:00
4467f91cbf
coredevice: do not give up on UTF-8 errors in log. Closes #300
2016-02-29 22:21:10 +08:00
c226aeb0d4
coredevice/spi: read_sync read bit
2016-02-29 14:55:29 +01:00
df7d15d1fe
runtime: refactor spi into rt2wb
2016-02-29 13:54:36 +01:00
8b2b278457
spi: add coredevice support
2016-02-29 00:44:48 +01:00
whitequark
cf41890255
Correctly display backtraces that contain inlined functions.
2016-02-24 17:44:19 +00:00
whitequark
950eaef08c
coredevice: re-export more exceptions.
2016-02-24 15:09:22 +00:00
whitequark
9db2be2b03
compiler: only use colors in diagnostics on POSIX ( fixes #272 ).
2016-02-22 11:27:45 +00:00
whitequark
a5977a5b62
Commit missing parts of 1465fe6f8.
2016-02-15 21:42:51 +00:00
68891493a3
analyzer: move common to artiq.protocols
...
migen was still pulled in through rtio.__init__.py
2016-01-29 20:26:48 -07:00
whitequark
7f9a180946
Fix typo.
2016-01-26 23:23:35 +00:00
d1119d7747
artiq_dir: move out of tools to unlink dependencies
2016-01-25 18:15:50 -07:00
cbb60337ae
refactor Analyzer constants to unlink dependencies
2016-01-25 18:03:48 -07:00
f4c7f02127
CoreException: store at 'py_exn.artiq_core_exception'
...
... and fix a few imports
2016-01-25 17:24:00 -07:00
e0f2d94191
coredevice: remove some print()s
2016-01-25 17:24:00 -07:00
2beaf23e6c
language...ARTIQException -> coredevice...CoreException
...
gets rid of a cross import
is only used there
2016-01-25 17:24:00 -07:00
765001054d
artiq.experiment: merge language and coredevice namespaces
...
perl -i -pe 's/^from artiq import \*$/from artiq.experiment import */' your_experiments/*.py
(assuming you skipped the changes form the previous commit)
2016-01-25 17:24:00 -07:00
dc709a77b8
PPP support (TCP broken)
2016-01-18 20:09:10 -07:00
whitequark
5c6b1517d0
Rigorously treat builtin core device exceptions.
2016-01-19 01:45:25 +00:00
whitequark
785b2736a0
Document core device cache ( #219 ).
2016-01-16 16:38:55 +00:00
whitequark
67d2e7a828
worker: display compile warnings and errors nicely ( #227 ).
2016-01-16 01:28:26 +00:00
a9cf89215b
coredevice/dds: use explicit 64-bit ints for ftw computations
2016-01-14 15:25:01 -07:00
whitequark
225f7d7302
Commit missing parts of 9366a29.
2016-01-10 20:01:26 +00:00
whitequark
b669e83554
Inject parameters into coredevice exception message when mapping.
2016-01-10 18:06:28 +00:00
whitequark
4198601abb
coredevice.exceptions: add CacheError.
2016-01-10 14:43:30 +00:00
whitequark
f8e50f2b0c
Remove redundant ksupport API.
2016-01-10 14:27:46 +00:00
whitequark
cc45694f5a
Commit missing parts of 9366a29.
2016-01-10 13:08:26 +00:00
whitequark
9366a29483
Implement core device storage ( fixes #219 ).
2016-01-10 13:04:55 +00:00
whitequark
03dd1c3a43
Refactor the logic of printing diagnostics to solely rely on Engine.
2016-01-04 22:11:54 +08:00
whitequark
38a99fde52
Implement selective attribute writeback using shadow memory.
2016-01-02 22:51:04 +08:00
whitequark
79d020dd3a
transforms.artiq_ir_generator: handle terminated try body.
2015-12-31 22:36:25 +08:00
