207717c740
artiq_dashboard: fix handling of moninj comment
2022-03-19 22:33:31 +08:00
6d92e539b1
artiq_ddb_template: add aqctl_moninj_proxy
2022-03-19 22:33:03 +08:00
6a49b8cb58
update dependencies
2022-03-19 19:53:38 +08:00
df1513f0e9
add aqctl_moninj_proxy to device dbs
2022-03-19 19:25:21 +08:00
d3073022ac
aqctl_moninj_proxy: fix all major bugs
2022-03-19 19:06:12 +08:00
bbb2c75194
add aqctl_moninj_proxy
2022-03-18 17:02:50 +08:00
710786388c
update nixpkgs
2022-03-17 21:09:48 +08:00
aff569b2c3
firmware: support 64-bit moninj probes
2022-03-17 19:56:07 +08:00
a159ef642d
drtio: demote default routing table message to info
2022-03-16 21:22:35 +08:00
1a26eb8cf2
coredevice: only print version mismatch warning when relevant
2022-03-16 21:21:43 +08:00
c1c2d21ba7
flake: fix error message when Vivado is not found
2022-03-16 21:20:48 +08:00
e5e4d55f84
mgmt: fix config write error message
2022-03-16 08:28:31 +08:00
71e8b49246
update nix dependencies
2022-03-10 17:04:44 +08:00
ebfeb1869f
firmware: use &CSlice for lists
2022-03-10 16:30:22 +08:00
eb6817c8f1
compiler/transforms/llvm_ir_generator: changed list representation
...
The representation of TList(T) is changed from `{T*, u32}` to
`{T*, u32}*`. The old representation forbids changing the length of a
list when the list is passed as a parameter into functions, as the
length is passed by value. The representation now matches with nac3.
2022-03-10 16:30:22 +08:00
8415151866
update copyright year
2022-03-10 11:56:16 +08:00
ciciwu
67ca48fa84
manual: fix formatting ( #1865 )
2022-03-08 19:03:47 +08:00
ciciwu
9a96387dfe
phaser: fix docstring formatting ( #1866 )
2022-03-08 19:03:30 +08:00
b02abc2bf4
remove legacy versioning files
2022-03-06 18:30:08 +08:00
ac55da81d8
core: support precompilation of kernels
2022-03-06 18:25:18 +08:00
232f28c0e8
kern_hw: fix return type
2022-03-04 15:16:14 +08:00
51fa1b5e5e
drtio: fix i2c switch
2022-03-04 15:16:14 +08:00
17ecd35530
test_i2c: fix for missing readback
2022-03-01 17:40:20 +08:00
a85b4d5f5e
I2C API for PCA9547 support ( #1860 )
2022-03-01 15:07:53 +08:00
David Nadlinger
9bfbd39fa3
flake.nix: Use upstream llvmlite 0.38.0, which already has the patches
2022-02-26 10:23:24 +08:00
338bb189b4
dashboard: fix typo ( #1858 )
2022-02-26 08:58:03 +08:00
Leon Riesebos
c4292770f8
Kasli JSON description for SPI over DIO cards ( #1800 )
2022-02-26 07:36:00 +08:00
2b918ac6f7
coredevice: merge pcf8574a into i2c
2022-02-25 19:01:14 +08:00
1b80746f48
Remove outer_final
...
We don't need to know whether there's a outer finally block
that's already implicit in the current break and continue
target.
Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-02-24 19:58:33 +08:00
2d6215158f
Fix try/finally:while:try compilation
...
When we have a trys inside a loop then we want to make sure any
finallys are executed by break and continue inside this try. But
this shouldn't pull finallys defined outside the loop in to the
loop. This change resets the `outer_final` attribute when
visiting for and while loops so that this doesn't happen.
Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-02-24 19:58:33 +08:00
c000af9985
flake: extra-sandbox-paths too
2022-02-23 15:35:47 +08:00
35f91aef68
flake: fix substituters
2022-02-23 15:35:47 +08:00
0da7b83176
runtime: add nac3 exception symbols
2022-02-23 11:04:53 +08:00
Steve Fan
ad656d1e53
dashboard: add device database reload action in context menu ( #1853 )
2022-02-22 16:18:27 +08:00
69ce09c7c0
manual: minor fixes
2022-02-21 18:44:18 +08:00
6a586c2e4d
manual: kasli-soc flashing
2022-02-21 16:27:59 +08:00
e84056f7e0
manual: Flakes installation instructions. Closes #1835
2022-02-21 16:20:14 +08:00
Mike Birtwell
a106ed0295
artiq_flash: don't try to make rtm_binary_dir if binary_dir unset ( #1851 )
...
Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-02-18 18:54:17 +08:00
c8b9eed9c9
fastino: add comments about sideeffects on v0.1
2022-02-16 14:42:22 +00:00
08b65470cd
fastino: robustify init()
...
* init() now also clear and resets more state including the interpolators.
If not done, this PLL unlocks/locks may lead to random interpolator state
on boot to which the CICs react badly.
* Use and expose `t_frame`
* Clarify implementation state of `read()`
2022-02-16 14:34:22 +00:00
65eab31f23
simplify board package format and artiq_flash
2022-02-14 15:54:17 +08:00
6dfc854673
flake: install artiq-comtools
2022-02-13 17:15:25 +08:00
5a8928fbf3
flake: set pythonparser version
2022-02-12 17:48:35 +08:00
b3b73948a2
flake: update dependencies
2022-02-12 11:04:41 +08:00
8433cc6731
flake: use sipyco flake
2022-02-12 10:59:10 +08:00
0649e69d94
flake: cleanup
2022-02-12 10:25:24 +08:00
bbfa926fa6
flake: add documentation outputs
2022-02-11 14:36:18 +08:00
9e37fb95d6
manual: use recommended contents caption
2022-02-11 14:25:10 +08:00
034a0fdb35
flake: install recommended wavedrom-cli. Closes #1845
2022-02-11 14:24:41 +08:00
0e178e40ac
RELEASE_NOTES: fix formatting
2022-02-11 14:23:56 +08:00
