Commit Graph

590 Commits

Author SHA1 Message Date
46fb5adac3 grabber: fix frequency counter formula 2018-07-12 20:14:38 +08:00
82def6b535 grabber: add frequency counter
Cameras are a bit obscure about what they output, this can help with troubleshooting.
2018-07-12 17:05:18 +08:00
29c35ee553 hmc7043: fix dumb mistake in previous commit 2018-07-12 13:01:41 +08:00
8802b930de hmc7043: add delay after init
Delay required at step 9 of the "Typical Programming Sequence" (page 24 of the datasheet)
2018-07-12 12:37:12 +08:00
c66f9483f8 hmc7043: wait after changing delays
Allows for the SPI transaction to finish, and for the delay to stabilize.
2018-07-12 12:33:53 +08:00
1c191a62bf sayma: tune SYSREF phases 2018-07-12 12:33:35 +08:00
773240bef4 hmc7043: test GPO before using
Based on code by David.
2018-07-12 11:30:24 +08:00
4843832329 hmc7043: check phase status on init. Closes #1055
Troubleshooting by David.
2018-07-11 19:45:24 +08:00
9397fa7f5a hmc7043: unstick SYSREF FSM (#1055)
Troubleshooting by David.

Additionally, register 7D is broken.
Checking phase init state has to be done through another means.
2018-07-11 19:11:01 +08:00
4f56710e4b grabber: add parser, report detected frame size in core device log 2018-07-10 02:06:37 +08:00
4eb26c0050 hmc7043: enable group 5 2018-07-03 14:16:31 +02:00
729ce58f98 sayma: use GTP_CLK1 to clock DRTIO satellite transceiver
This is required to get constant skew between the DRTIO transceiver clock
(which then generates the RTIO clock) and the siphaser reference clock.

Both the Si5324 and the RTM clock tree have non-deterministic in-to-out skew
at 150MHz due to dividers.
2018-06-28 11:23:40 +08:00
a65721d649 sayma: put RTM clock tree into the siphaser loop
* Fixes one bug where siphaser was one Si5324 output and the rest of the
system was clocked by the other. With the Si5324 settings we have, skew
between the outputs is not controlled.
* Puts the coaxial cable between AMC and RTM into the siphaser loop.
2018-06-27 21:46:55 +08:00
d49716dfac satman: tune Sayma SYSREF phases 2018-06-27 18:09:35 +08:00
46c044099c hmc7043,satman: verify alignment of SYSREF slips 2018-06-27 17:36:13 +08:00
7dfd70c502 hmc7043: make margin_{minus,plus} consistent with ad9154 2018-06-27 17:35:26 +08:00
4bbdd43bdf hmc7043: do not freeze if SYSREF slip fails 2018-06-27 17:32:56 +08:00
a8a2ad68d3 runtime: tune Sayma SYSREF phases 2018-06-27 17:31:29 +08:00
84b3d9ecc6 bootloader: also check firmware CRC in SDRAM (#1065) 2018-06-23 11:28:12 +08:00
68530fde07 sayma: generate 100MHz from Si5324 on standalone and master targets
* Allow switching between DRTIO satellite and standalone without
  touching the hardware.
* Allow operating standalone and master without an additional RF
  signal generator.
2018-06-23 10:44:38 +08:00
whitequark
b6dd9c8bb0 runtime: support builds without RTIO DMA.
Fixes #1079.
2018-06-23 00:56:21 +00:00
76fc63bbf7 jesd204: use separate controls for reset and input buffer disable 2018-06-22 11:38:18 +08:00
de7d64d482 sayma: clock JESD204 from GTP CLK2
This frees up GTP CLK1, which is routable to the SFP quads, for DRTIO.
2018-06-21 22:33:53 +08:00
07bcdfd91e hmc7043: stricter check of FPGA SYSREF margin 2018-06-21 22:26:49 +08:00
e29536351d drtio: resync SYSREF when TSC is loaded 2018-06-21 17:00:32 +08:00
5a2a857a2f firmware: clean up SYSREF phase management 2018-06-21 16:23:41 +08:00
05e908a0fd hmc7043: align SYSREF with RTIO 2018-06-21 15:54:42 +08:00
9741654cad hmc7043: style 2018-06-21 15:54:42 +08:00
45e8263208 hmc7043: do not configure phases during initial init
They are determined later on.
2018-06-21 15:54:42 +08:00
whitequark
7cc3da4faf firmware: do not lose the ".dirty" suffix in build versions.
Fixes #1074.
2018-06-21 05:18:51 +00:00
whitequark
095ee28fd9 runtime: fix size values for bytes and bytearray RPCs.
Fixes #1076.
2018-06-21 00:51:56 +00:00
814d0583db hmc7043: improve smoothness of sysref phase control 2018-06-20 17:40:48 +08:00
5272c11704 typo 2018-06-20 17:05:20 +08:00
0c32d07e8b ad9154: new sysref scan
Print margins around the pre-defined fixed phase.
Also report error if margins are too small.

The fixed phase is also changed by this commit (the value 88 is
from before the new HMC7043 initialization code, and is probably wrong).
2018-06-20 00:15:58 +08:00
3d0e92aefd hmc7043: check that chip is disabled at startup 2018-06-19 23:49:17 +08:00
740e6863c3 hmc7043: add delay after releasing hardware reset 2018-06-19 23:48:48 +08:00
75b6cea52f sayma: add SAWG to DRTIO satellite 2018-06-19 19:12:10 +08:00
eb3259b847 firmware: reduce number of DAC initialization attempts
Faster startup when one DAC is broken.
2018-06-19 19:10:23 +08:00
1d594d0c97 firmware: make DAC initialization failures non-fatal
This allows using RTMs with one broken DAC for development.
2018-06-19 19:09:38 +08:00
158b5e3083 satman: program Allaki 2018-06-19 18:09:05 +08:00
574892a4e5 firmware/serwb: cleanup and improve messaging 2018-06-19 15:11:03 +08:00
c862471165 typo 2018-06-19 14:35:24 +08:00
433273dd95 sayma: support RTM FPGA, HMC830 and HMC7043 in DRTIO master and satellite 2018-06-19 14:33:48 +08:00
476cfa0f53 si5324: improve lock messaging 2018-06-19 14:29:57 +08:00
d29b3dd588 hmc830: compile-time configurable reference frequency 2018-06-19 13:47:32 +08:00
0e640a6d6f hmc7043: fix SYSREF to meet s/h at FPGA (#794) 2018-06-18 17:04:12 +08:00
6272052d15 ad9154: don't drive the bsm with txen pins 2018-06-18 10:04:42 +02:00
4f0c918dd3 slave_fpga: improve messaging 2018-06-17 00:27:27 +08:00
40baa8ecba hmc7043: disable ch 10 and 11 group 2018-06-15 15:34:31 +00:00
edfae3c4ba hmc7043: make fpga fabric clocks lvds
2 V common and 1.9 Vpp swing
is brutal to the banks (HP 1.8V AMC and RT 1.8V RTM)
2018-06-15 14:24:33 +00:00
f385add8b1 slave_fpga: disable cclk and din drive when done
to guard against accidental contention (old rtm gateware
but #813 rework done)
2018-06-13 16:26:48 +00:00
a9a25f2605 sayma_rtm: drive ref_lo_clk_sel, and set clk muxes early 2018-06-12 20:00:12 +02:00
Thomas Harty
b90a8fcc82 Merge branch 'master' of https://github.com/m-labs/artiq 2018-06-12 14:55:22 +01:00
ion
28ecf81c6c Sayma: HMC7043 init and detect no longer need results. 2018-06-12 13:10:26 +01:00
ion
c8935f7adf Sayma: bypass dividers where possible to minimize noise (nb this changes the output skew). 2018-06-12 12:56:04 +01:00
hartytp
7a0140ecb2
Sayma HMC830: update interface and register writes. (#1068)
* Break the HMC830 init into separate functions for general purpose (but, integer-N) init, setting dividers and checking lock

* Use 1.6mA ICP (which the loop filter was optimized for)

* Go through the data sheet carefully and set all registers to the correct value (e.g. ensure that all settings are correctly optimized for integer-N usage)

* Change divider values (now using 100MHz PFD, which should give lower noise in theory)
2018-06-12 12:37:17 +01:00
a9d97101fc slave_fpga: add another check 2018-06-12 10:24:04 +02:00
a143e238a8 savel_fpga: get rid of unneeded config 2018-06-12 10:24:04 +02:00
4912f53ab4 slave_fpga: board_misoc 2018-06-12 10:24:04 +02:00
hartytp
cb6e44b23a Sayma: disable unused HMC7043 outputs. 2018-06-12 16:18:20 +08:00
af88c4c93e clean up hmc7043 reset 2018-06-05 20:41:48 +08:00
Thomas Harty
988054f4bb Sayma: fix mistake in HMC7043 init code. 2018-06-05 19:22:04 +08:00
Thomas Harty
bd1ac7cf3b Configure HMC7043 to give deterministic phase differences between its outputs 2018-06-05 19:22:04 +08:00
Thomas Harty
ac5c4913ec Sayma RTM: hold hmc7043 in reset/mute state during init. 2018-06-05 19:22:04 +08:00
Florent Kermarrec
b82158a2de firmware/ad9154: add stpl test 2018-06-05 02:08:57 +02:00
Florent Kermarrec
925b47b077 firmware/ad9154: reset the dac between each configuration attempt 2018-06-04 14:03:26 +02:00
whitequark
d686d33093 runtime: print hex dumps around PC/EA in case of exception.
For #1026.
2018-06-01 21:17:59 +00:00
whitequark
2e09307d8d firmware: use writeln instead of write in UART logger. 2018-05-29 03:16:52 +00:00
560889372f firmware: grabber support 2018-05-29 10:26:36 +08:00
b860302a9a firmware: fix typo in UART logger 2018-05-28 17:25:23 +00:00
whitequark
2b7d98eb04 firmware: enable all log levels when creating UART logger.
The default is all off.
2018-05-28 16:49:25 +00:00
Florent Kermarrec
bcb9c3d09d firmware/serwb: move prbs_test outside of wait_init, add wishbone_test 2018-05-24 16:53:47 +02:00
Florent Kermarrec
353767bfdb firmware/hmc830: add VCO subsystem register 6 programming (suggested by hartytp, tested on hardware without regression) 2018-05-24 16:49:49 +02:00
Florent Kermarrec
ad89c42acc firmware/serwb: automatically adjust prbs test delay to prbs test cycles, increase prbs test cycles 2018-05-24 10:20:55 +02:00
Florent Kermarrec
19e5280824 firmware/ad9154: cleanup DAC init
- Split dac_setup in dac_reset, dat_detect & dac_setup.
- Only do one reset/detection.
- Configure before doing SYSREF scan (otherwise scan don't work at the first scan after power up).
- Do the spi_setup in each function.
2018-05-24 09:34:00 +02:00
Florent Kermarrec
fa3b48737b firmware/hmc830: Added magic word to HMC830 init sequence (from gkasprow & marmeladapk) 2018-05-24 09:23:00 +02:00
b10d3ee4b4 make RTIO clock switch optional and simplify
Kasli no longer has an internal RTIO clock.
Switching clocks dynamically is no longer supported.
2018-05-18 17:41:34 +08:00
whitequark
5744d97d59 firmware: adjust backtrace addresses correctly. 2018-05-17 08:13:55 +00:00
d4f074b1e1 firmware: fix Allaki addressing. Closes #993 2018-05-17 16:02:21 +08:00
whitequark
31c6c79204 firmware: implement an edge profiler.
It doesn't work extremely well, and the results can be somewhat
confusing, and it needs a libunwind patch, but it's the best I could
do and it seems still useful.
2018-05-16 21:53:53 +00:00
a640041844 firmware: improve ad9154/hmc830/hmc7043 messaging 2018-05-16 23:15:17 +08:00
fedf7f0c87 firmware/ad9154: cleanup sysref scan and run everytime 2018-05-16 23:01:19 +08:00
1364cd2948 firmware/hmc830_7043: break out HMC830 SPI mode selection 2018-05-16 22:46:45 +08:00
0aadd3a361 firmware/hmc830_7043: improve messaging 2018-05-16 22:46:45 +08:00
whitequark
4d06c1d84b coredevice.CommKernel: modernize. NFC. 2018-05-16 14:40:14 +00:00
whitequark
ca93b94aea firmware: move config requests to management protocol.
They were only in session protocol because of historical reasons.
2018-05-16 14:32:49 +00:00
Florent Kermarrec
7fe49a78d2 firmware/runtime/session: fix compilation when no rtio core 2018-05-15 23:47:47 +02:00
whitequark
8128a814f6 firmware: update dependencies. 2018-05-15 18:17:32 +00:00
whitequark
1b0384c513 firmware: fix satman build. 2018-05-15 16:35:05 +00:00
whitequark
07b713fdad firmware: use upstream log_buffer. 2018-05-15 15:19:20 +00:00
whitequark
9f5b76253c firmware: remove some unnecessary unwraps. 2018-05-15 15:05:19 +00:00
whitequark
e5796e26e1 firmware: remove unused #![feature(untagged_unions)]. 2018-05-15 15:05:19 +00:00
whitequark
b54926134c firmware: update the signature of #[lang="panic_fmt"]. 2018-05-15 15:05:19 +00:00
Florent Kermarrec
c18a73d45f sayma_amc/rtm: use new serwb low-speed phy 2018-05-15 16:40:50 +02:00
whitequark
9347f6e00c firmware: use a dedicated error type in the scheduler.
After this commit, error handling does not normally allocate
(session::Error::{Load,Unexpected} still allocate, but those two
are very rare).

Good riddance to libstd_artiq.
2018-05-15 14:19:44 +00:00
whitequark
479cb9a857 firmware: use dedicated error types for every protocol and thread.
Good riddance to io::Error::Unrecognized.
2018-05-15 13:27:23 +00:00
whitequark
514eab3d39 Update Rust to 1.26.0. 2018-05-15 12:47:51 +00:00
whitequark
26faaad2b7 firmware: remove io::Result<T, E> in favor of Result<T, impl Fail>.
This doesn't yet use impl Fail since std_artiq::io::Error doesn't
impl it.
2018-05-15 08:29:03 +00:00
whitequark
140ca729aa firmware: rename io::Error::{UnexpectedEof→UnexpectedEnd}.
We don't even have files.
2018-05-15 08:27:45 +00:00
whitequark
ce0593315b firmware: move {ProtoRead,ProtoWrite} to the root of libio. 2018-05-15 08:16:09 +00:00