3c1cbf47d2
phaser: add more slack during init. Closes #1757
2021-10-10 16:18:55 +08:00
3f6bf33298
fastino: add interpolator support
2021-10-08 15:47:07 +00:00
59065c4663
alloc_list: support alloc w/ large align
...
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2021-10-07 12:38:03 +08:00
1894f0f626
gateware: share RTIOClockMultiplier and fix_serdes_timing_path ( #1760 )
2021-10-07 08:19:38 +08:00
a8333053c9
sinara_tester: add device_db and test selection CLI options
...
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-27 17:44:50 +08:00
3ed10221d8
compiler: remove big-endian support. Closes #1590
2021-09-13 13:40:24 +08:00
e8a7a8f41e
compiler: work around idiotic windoze behavior that causes conda ld.lld not to be found
2021-09-13 10:40:54 +08:00
ffb1e3ec2d
wavesynth: np.int is deprecated
2021-09-13 07:02:35 +08:00
2d79d824f9
firmware: remove minor or1k leftovers
2021-09-12 20:03:37 +08:00
a573dcf3f9
board_misoc/build: use rv32 as target arg
...
The original rv64 argument was only to match the misoc counterpart.
2021-09-10 14:11:23 +08:00
448974fe11
runtime/main: cleanup
2021-09-10 13:59:53 +08:00
b091d8cb66
kernel: flush cache before mod_init
...
This could be necessary as redirecting instructions from D$ directly to I$ as it seems.
Related: https://github.com/SpinalHDL/VexRiscv/issues/137
2021-09-10 13:25:12 +08:00
5394d04669
test_spi: add delay
2021-09-10 13:25:12 +08:00
b8ed5a0d91
alloc: fix alignment for riscv32 arch
2021-09-10 13:25:12 +08:00
2213e7ffac
ksupp/rtio/exception: fix timestamp
2021-09-10 13:25:12 +08:00
09ffd9de1e
dma: fix timestamp fetch
2021-09-10 13:25:12 +08:00
051a14abf2
rtio/dma: fix endianness
2021-09-10 13:25:12 +08:00
c6ba0f3cf4
ksupport: fix dma cslice (ffi)
2021-09-10 13:25:12 +08:00
c812a837ab
runtime: enlarge stack size
2021-09-10 13:25:12 +08:00
a596db404d
satman: fix cargo xbuild sysroot
2021-09-10 13:25:12 +08:00
4fab267593
cargo: std dependency hack
2021-09-10 13:25:12 +08:00
dcbd9f905c
cargo: use cargo xbuild
2021-09-10 13:25:12 +08:00
9f6b3f6014
firmware: clarify target triple
...
The lack of compressed instruction support can be inferred from the target triple, literally.
2021-09-10 13:25:12 +08:00
4619a33db4
test: remove broken array return tests
...
Removed test cases that do not respect lifetime/scope constraint.
See discussion in artiq-zynq repo: M-Labs/artiq-zynq#119
Referred to the patch from @dnadlinger. 5faa30a837
2021-09-10 13:25:12 +08:00
5985f7efb5
syscall: lower nowrite to inaccessiblememonly
...
In the origin implementation, the `nowrite` flag literally means not writing memory at all.
Due to the usage of flags on certain functions, it results in the same issues found in artiq-zynq after optimization passes. (M-Labs/artiq-zynq#119 )
A fix wrote by @dnadlinger can resolve this issue. (c1e46cc7c8
)
2021-09-10 13:25:12 +08:00
6db7280b09
flake: board package WIP
2021-09-10 13:25:12 +08:00
d8ac429059
dyld: streamline lib.rs
...
Only riscv32 is supported anyway, no need to have excessive architecture check.
2021-09-10 13:25:12 +08:00
798774192d
slave_fpga/bootloader: read in little endian
2021-09-10 13:25:12 +08:00
eecd825d23
firmware: suppress warning
2021-09-10 13:25:12 +08:00
1da0554a49
pcr: purge
2021-09-10 13:25:12 +08:00
5d0a8cf9ac
llvm_ir_gen: fix indent
2021-09-10 13:25:12 +08:00
70507e1b72
Cargo.lock: update
2021-09-10 13:25:12 +08:00
c113cd6bf5
libfringe: bump
2021-09-10 13:25:12 +08:00
61b0170a12
firmware: purge or1k
2021-09-10 13:25:12 +08:00
af263ffe1f
ksupport: fix rpc, cache signature (FFI)
...
The reason of the borrow stuff is explained in M-Labs/artiq-zynq#76 (artiq-zyna repo).
As for `cache_get()`, compiler will perform stack allocation to pre-allocate the returned structure, and pass to cache_get alongside the `key`.
However, ksupport fails to recognize the passed memory, so it will always assume the passed memory as the key.
2021-09-10 13:25:12 +08:00
a833974b50
analyzer: fix endianness
2021-09-10 13:25:12 +08:00
d623acc29d
llvm_ir_gen: fix now with now_pinning & little-endian target
2021-09-10 13:25:12 +08:00
8fa47b8119
rpc: enforce alignment
2021-09-10 13:25:12 +08:00
de0f2d4a28
firmware: adopt endianness protocol in artiq-zynq
...
Related:
artiq-zynq: M-Labs/artiq-zynq#126
artiq: #1588
2021-09-10 13:25:12 +08:00
9afe63c08a
ksupport: fix proto_artiq dependency
2021-09-10 13:25:12 +08:00
29a2f106d1
ksupport: replace asm with llvm_asm
2021-09-10 13:25:12 +08:00
b30ed75e69
kernel.ld: load elf header and prog headers
...
ld.lld has a habit of not putting the headers under any load sections.
However, the headers are needed by libunwind to handle exception raised by the kernel.
Creating PT_LOAD section with FILEHDR and PHDRS solves this issue. Other PHDRS are also specified as linkers (not limited to ld.lld) will not create additional unspecified headers even when necessary.
2021-09-10 13:25:12 +08:00
279593f984
ksupport.ld: merge sbss with bss
2021-09-10 13:25:12 +08:00
1ba8c8dfee
runtime: remove irq again
2021-09-10 13:25:12 +08:00
3d629006df
makefiles: revert byte-swaps
2021-09-10 13:25:12 +08:00
7542105f0f
board_misoc: remove pcr
...
VexRiscv seems to not support additional hardware performance counter, at least I have not seen any documentation on how to use it.
2021-09-10 13:25:12 +08:00
01ca114c66
runtime: remove irq dependency
2021-09-10 13:25:12 +08:00
36171f2c61
runtime: remove inaccurate sp on panic
2021-09-10 13:25:12 +08:00
01e357e5d3
ksupport.ld: reduce load section alignment
2021-09-10 13:25:12 +08:00
f77b607b56
compiler: generate symbols
2021-09-10 13:25:12 +08:00
1293e0750e
ld, makefiles: use ld.lld
2021-09-10 13:25:12 +08:00
fc42d053d9
kernel: use vexriscv
2021-09-10 13:25:12 +08:00
1b516b16e2
targets: default to vexriscv cpu
2021-09-10 13:25:12 +08:00
e8fe8409b2
libartiq_support: compatibility with recent stable rustc
2021-09-10 13:25:12 +08:00
cabe5ace8e
compiler: remove DebugInfoEmitter for now
...
Causes problems with LLVM 9 and not needed at first.
2021-09-10 13:25:12 +08:00
6629a49e86
compiler: use LLVM binutils/linker for Arm as well
...
Previously we kept GNU Binutils because they are less of a pain to support
on Windoze - the source of so many problems - but with RISC-V we need to
update LLVM anyway.
2021-09-10 13:25:12 +08:00
43d120359d
compiler: switch to upstream llvmlite and RISC-V target
2021-09-10 13:25:12 +08:00
5656e52581
remove profiler
2021-09-10 13:25:12 +08:00
1b8b4baf6a
ksupport: fix panic, libc, unwind
2021-09-10 13:25:12 +08:00
905330b0f1
ksupport: handle riscv exceptions
2021-09-10 13:25:12 +08:00
50a62b3d42
liballoc: change align to 16 bytes
2021-09-10 13:25:12 +08:00
7f0bc9f7f0
runtime/makefile: specify emulation, flip endianness
2021-09-10 13:25:12 +08:00
c42adfe6fd
runtime.ld: merge .sbss & .bss
2021-09-10 13:25:12 +08:00
f56152e72f
rust: fix dependencies
2021-09-10 13:25:12 +08:00
c800b6c8d3
runtime: update rust alloc, managed
2021-09-10 13:25:09 +08:00
e99061b013
runtime: add riscv
2021-09-10 13:23:22 +08:00
ecedec577c
runtime: impl riscv exception handling
2021-09-10 13:23:15 +08:00
252594a606
runtime: impl riscv panic handler
2021-09-10 13:20:31 +08:00
31bf17563c
personality: update from rust/panic_unwind
2021-09-10 13:20:31 +08:00
bfddd8a30f
libdyld: add riscv support
2021-09-10 13:20:31 +08:00
ad3037d0f6
libc: add minimal C types
2021-09-10 13:20:31 +08:00
daaf6c3401
libunwind: add rust interface
2021-09-10 13:20:31 +08:00
6d9cebfd42
satman: handle .sbss generation
2021-09-10 13:20:31 +08:00
96438c9da7
satman: make fbi big-endian
2021-09-10 13:20:31 +08:00
6535b2f089
satman: fix feature
2021-09-10 13:20:31 +08:00
45adaa1d98
satman: add riscv exception handling
2021-09-10 13:20:31 +08:00
869a282410
satman: use riscv
2021-09-10 13:20:31 +08:00
ebb9f298b5
proto_artiq: update alloc type path
2021-09-10 13:20:31 +08:00
97a0132f15
libio: update alloc type path
2021-09-10 13:20:31 +08:00
37ea863004
libio: pin failure version
2021-09-10 13:20:31 +08:00
3ff74e0693
bootloader: handle .sbss generation in .ld
...
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
448fe0e8cf
bootloader: fix panic
...
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
8294d7fea5
bootloader: swap endianness
...
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
13032272fd
bootloader: add rv32 exception handler
...
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
46102ee737
board_misoc: build vectors.S with rv64 target in misoc
...
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
b87ea79d51
rv32: rm irq & vexriscv-rust
...
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
9aee42f0f2
rv32/boot: remove hotswap
...
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
82b4052cd6
libboard_misoc: vexriscv integration
...
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
Leon Riesebos
2cf144a60c
ddb_template: edge counter keys correspond with according ttl keys
...
previously ttl_counter_0 and ttl_0 could be on completely different physical ttl output channels
with this change, ttl_0_counter (note the changed key format) is always on the same channel as ttl_0
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-09-06 09:06:04 +08:00
4d7bd3ee32
phaser: fail init() if frame timestamp measurement times out
...
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-03 12:01:26 +02:00
075cb26dd7
phaser: rename get_next_frame_timestamp() to get_next_frame_mu()
...
and implement review comments (PR #1749 )
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-03 09:58:01 +02:00
7aebf02f84
phaser: docs: add reference to get_next_frame_timestamps(), fix typo
...
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:44:46 +02:00
61b44d40dd
phaser: add labels to debug init prints
...
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:43:30 +02:00
65f8a97b56
phaser: add helpers to align updates to the RTIO timeline
...
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:42:54 +02:00
SingularitySurfer
65f63e6927
fix suservo start
2021-08-19 07:38:48 +00:00
a53162d01d
tester: tweak suservo
...
* p gain 1 to get reasonable power
* refine testing instructions and comments
2021-08-19 09:17:14 +02:00
SingularitySurfer
4d21a72407
Implement SUServo tester.
2021-08-18 15:10:27 +00:00
Mikołaj Sowiński
898122f3e5
Added support for HVAMP_8CH ( #1741 )
2021-08-16 13:39:00 +08:00
420891ba54
syntax
2021-08-12 13:01:35 +08:00
9f94bc61ae
missing part of 477b1516d
2021-08-12 12:55:37 +08:00
c69a1316ad
compiler: stop using sys.version_info for parser
2021-08-12 12:52:24 +08:00
477b1516d3
remove profiler
2021-08-12 12:51:55 +08:00
67847f98f4
artiq_run: fix multiarch
2021-08-12 12:48:10 +08:00
7879d3630b
made kc705/gtx interface more similar to kasli/gtp
2021-08-10 18:53:52 +08:00
242dfae38e
kc705: fix DRTIO targets
2021-08-06 15:41:47 +08:00
5111132ef0
ICAP: prevent sayma from using it ( #1740 )
2021-08-06 15:08:30 +08:00
dc546630e4
kc705: DRTIO variants WIP
2021-08-06 14:41:41 +08:00
fd824f7ad0
ddb_template: print LED channel nos on Kasli v2
2021-08-05 17:29:38 +02:00
c9608c0a89
zotino: default div_read unified with ad53xx at 16, fix ad53xx doc
2021-08-05 17:42:11 +08:00
6b88ea563d
talk to ICAP primitive to restart gateware ( #1733 )
2021-08-05 17:00:31 +08:00
97e994700b
compiler: turn __repr__ into __str__ when sphinx is used. Closes #741
2021-08-05 11:32:20 +08:00
c3d765f745
ad9910: fix type annotations
2021-08-05 11:30:54 +08:00
53a98acfe4
artiq_flash: cleanup openocd handling, do not follow symlinks
...
Not following symlinks allows files to be added to OpenOCD via nixpkgs buildEnv.
2021-07-26 17:01:24 +08:00
30e5e06a33
moninj: fix read of incomplete data ( #1729 )
2021-07-22 17:56:38 +08:00
ebb67eaeee
applets: add length warning message on plot for plot_xy_hist
and fix bug ( #1725 )
2021-07-19 15:45:48 +08:00
943a95e07a
applets: add data length warning message for plot_xy
( #1722 )
2021-07-19 15:14:15 +08:00
e996b5f635
applets: fix warning timing
2021-07-19 12:26:01 +08:00
4fb8ea5b73
artiq_flash: determine which firmware to flash by looking at filesystem
...
Closes #1719
2021-07-14 16:43:00 +08:00
5cd721c514
applets: add plot_hist dataset length mismatch warning ( #1718 )
2021-07-14 15:57:55 +08:00
Star Chen
6ce9c26402
GUI: add option to create new datasets ( #1716 )
2021-07-13 12:53:35 +08:00
2204fd2b22
adf5356: add delay to sync()
...
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2021-07-08 10:03:20 +08:00
b10d1bdd37
compiler: proper union find
...
The find implementation was not very optimized, and the unify function
did not consider tree height and may build some tall trees.
2021-07-07 09:22:16 +08:00
4ede58e44b
compiler: reduce calls to TypedTreeHasher
...
We need to check if our inference reached a fixed point. This is checked
using hash of the types in the AST, which is very slow. This patch
avoids computing the hash if we can make sure that the AST is definitely
changed, which is when we parse a new function.
For some simple programs with many functions, this can significantly
reduce the compile time by up to ~30%.
2021-07-07 09:22:16 +08:00
822e8565f7
compiler: supports kernel decorators with path
2021-07-02 17:01:31 +08:00
6fb31a7abb
compiler: allow empty list in quote
2021-07-02 15:16:19 +08:00
0806b67dbf
compiler: speedup list processing
2021-07-02 14:22:25 +08:00
f531af510c
compiler: fixed embedding annotation evaluation
2021-06-25 11:32:23 +08:00
c29a149d16
compiler: allows string annotation
...
According to PEP484, type hint can be a string literal for forward
references. With PEP563, type hint would be preserved in annotations in
string form.
2021-06-25 11:01:48 +08:00
Etienne Wodey
68268e3db8
docs: fix some formatting issues
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-23 20:29:43 +08:00
Etienne Wodey
cca654bd47
test_device_db: fix on Windows (tempfile access limitations)
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-21 16:47:22 +08:00
Etienne Wodey
8bedf278f0
set_dataset: pass HDF5 options as a dict, not as loose kwargs
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 16:43:05 +02:00
Etienne Wodey
12ef907f34
master/databases: fix AttributeError in DatasetDB.set()
...
Add corresponding unit test.
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 16:30:38 +02:00
Etienne Wodey
d8b1e59538
datasets: allow passing options to HDF5 backend (e.g. compression)
...
This breaks the internal dataset representation used by applets
and when saving to disk (``dataset_db.pyon``).
See ``test/test_dataset_db.py`` and ``test/test_datasets.py``
for examples.
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 12:04:16 +02:00
Etienne Wodey
b8ab5f2607
master/databases: use tools.file_import to load the device_db
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 07:58:17 +08:00
Etienne Wodey
5c23e6edb6
test: add regression tests for master.databases.DeviceDB
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 07:58:17 +08:00
7046aa9c23
compiler: stop using deprecated numpy.float
2021-06-15 10:48:34 +08:00
ea0c7b6173
Merge remote-tracking branch 'harrydrtio/k7-drtio'
2021-06-15 10:04:45 +08:00
Star Chen
9dee8bb9c9
Kasli: Added front panel user LED ( #1623 ) ( #1694 )
2021-06-07 16:05:50 +08:00
bcb030cc9c
aqctl_corelog: fix endianness issue ( closes #1682 ) ( #1689 )
...
Fixed according to
https://forum.m-labs.hk/d/190-fetchingreading-the-core-log-in-a-central-location/10
Tested with both KC705 and ZC706.
2021-06-03 14:06:17 +08:00
ea1dd2da43
artiq_ddb_template: kasli-soc support
2021-05-30 20:33:44 +08:00
Leon Riesebos
07bd1e27c1
artiq_flash: wrap paramiko commands in bash login shell
...
the login shell will load the nix environment on non-nixos systems
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-05-27 21:44:10 +08:00
4c743cf8af
revert busy polling
2021-05-23 14:07:11 +08:00
1e9a131386
coredevice.comm_kernel: performance improvement
...
reduced latency by busy polling, and improved byte list performance.
2021-05-23 13:30:00 +08:00
43b2a3791c
jsonschema: only allow enable_sata_drtio=true for Kasli if v1.0/1.1
2021-05-17 12:46:19 +08:00
935e18c1be
artiq_flash: improve openocd not found error message
2021-05-13 14:45:23 +08:00
129cf8c1dd
Phaser: Make set_nco_phase set the phase of the NCO
...
Previous to this commit `set_nco_phase()` set the phase of the DUC instead
of the NCO. Setting the phase of the NCO may be desirable to utilise the
auto-sync functionality of the double-buffered DAC-NCO settings.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-11 23:16:14 +01:00
043c9c20d7
phaser: Improve documentation of DAC settings
...
1. Clarify which features require additional configuration via the `dac`
constructor argument.
2. Document when DAC settings apply immediatly/are staged.
3. Document how staged DAC settings may be applied
4. Calrify operation of `dac_sync`
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:58:30 +01:00
f97baa8aec
phaser: workaround malformed output with mixer_ena=1
& nco_ena=0
...
When Phaser is powered on and `init()` is first called, enabling the
DAC-mixer while leaving the NCO disabled causes malformed output.
This commit implements a workaround by making sure the NCO is enabled,
before being set to the disired state.
This commit also avoids the following procedure, resulting in
malformed output:
1. Operate Phaser with the DAC Mixer and NCO enabled
2. Set the NCO to a non-zero frequency
3. Disable the NCO in the device_db
4. Re-initialise Phaser
After this procedure, with CMIX disabled, incorrect output is produced.
To clear the fault one must re-enable the NCO and write the NCO freqeuncy
to zero before disabling the NCO.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
4fa2028671
phaser: fix coarse mixer register offset
...
The CMIX bits are bits 12-15 in register 0x0d. This has been checked
against the datasheet and verified on hardware. Until now, the bit for
CMIX1 was written to CMIX0. The CMIX0 bit was written to a reserved bit.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
515cfa7dfb
Phaser: expose coarse mixer and document need to enable the DAC-mixer.
...
in some use cases a larger tunable range than available via the DUC may
be needed. Some use cases may wish to combine the coarse mixer with the
DUC to extend the tunable range.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
4f812cc4ed
Phaser: zero oscillator amplitude after init()
( close #1651 )
...
Currently, `init()` leaves a single oscillator at full scale. The phase
accumulator of this oscillator is held continuously cleared. Provided no
upconverting mechanism is active (DUC, CMIX, NCO), this produces a full-scale
DC voltage. The DC voltage is blocked by hardware capacitors. This behaviour
is not mentioned by the `init` documentation.
If one attempts to use any other oscillator without reducing the amplitude
of the oscillator enabled by `init`, there is by significant clipping.
In the case that the NCO or CMIX are configured via the device_db
(suggested in the docs), leaving the osillator at full scale results in
full RF output power after calling `init()`. This may plausibly damage loads
driven by phaser.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
407fba232d
Phaser upconverter: set phase-frequency detector to 62.5 MHz ( close #1648 )
...
The suitable PFD clock depends on the use case and will likely need
to be configured by some users. All things being equal, a higher PFD
clock is desirable as is results in lower local oscillator phase-noise.
Phaser was designed around a maximum PFD clock of 62.5 MHz. In integer mode,
with no local oscillator frequency divisor set, a 62.5 MHz PFD clock results
in a 125 MHz local oscillator step size. Given the +-200 MHz range of the DUC
(more if using the DAC mixer), this step size will be acceptable to many.
This seems like the most appropreate default configuration as it should offer
the best phase-noise performance.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
75445fe5f0
Phaser: expose and automate clearing of DAC sif_sync
( close #1630 and #1650 )
...
`sif_sync` must be triggered to apply NCO frequency changes. To achieve per
channel frequency tunability exeeding the range of the DUC, the NCO frequeny must
adjusted. User code will need to trigger `sif_sync` to achieve this.
`sif_sync` can only be triggered if the bit was cleared. To avoid this pitfall,
the clearing of `sif_sync` is automated.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
1c96797de5
Phaser upconverter: Follow datasheet procedure for VCO calibration ( close #1643 )
...
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
7404152e4c
Phaser upconverter: rename ndiv
-> nint
to match datasheet ( close #1638 )
...
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
eb477ee06b
phaser: print gw_rev in debug mode
2021-05-08 14:48:46 +01:00
c7e992e26d
Phaser: flake8
...
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:46 +01:00
eb38b664e3
phaser: typo
2021-05-07 10:00:10 +08:00
Peter Drmota
47bf5d36af
coredevice.comm_kernel: Fix unpacking of lists of numpy.int64
...
test.coredevice.test_embedding: Add tests for list of numpy.int64
2021-04-21 15:46:58 +01:00
Leon Riesebos
af4fadcd54
added DefaultMissing to __all__
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:42:21 +08:00
Leon Riesebos
a0cea3a011
added __iter__ and __len__ to ScanObject base class
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:42:21 +08:00
Leon Riesebos
2671c271d4
ad99xx unified type annotations for cfg_sw() methods and fixed test cases
...
closes #1642
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:29:55 +08:00
Leon Riesebos
d745d50245
ad99xx added additional kernel invariants
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:18:31 +08:00
Leon Riesebos
4a6201c083
ad99xx make kernel invariants instance variable
...
prevents mutations on class variable that applies to all instances at once
closes #1654
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:18:31 +08:00
ffe1c9f9b1
Merge pull request #1628 from pathfinder49/fastino_mu_fix
...
fastino: ensure `xxx_to_mu()` methods return int32 on the host
2021-04-15 15:02:12 +02:00
bda5aa7c7e
fastino: ensure xxx_to_mu()
methods return int32 on the host
...
Currently running `voltage_to_mu()` or `voltage_group_to_mu()` on the host will
convert all machine unit values to int64. This leads to issues when machine units
are returned from RPCs.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-04-15 11:41:22 +01:00
David Nadlinger
b7f3eaebf9
gui: Fix occasional wrong fuzzy select menu position on KDE/Linux
2021-04-04 00:04:11 +01:00
fc59791583
jsonschema: mirny: fix clk_sel default value
2021-03-30 16:06:56 +08:00
8002fcf8bb
jsonschema: style
2021-03-29 17:49:43 +08:00
5f32cb7196
jsonschema: mirny: accept string enums for validating clk_sel
2021-03-29 17:49:43 +08:00
75efb8985c
ddb_template: mirny_cpld: accept clk_sel as a string
2021-03-29 17:49:43 +08:00
David Nadlinger
bdaaf3c1d7
dashboard: Disable Group CCB policy menu before first entry is selected
...
It was possible to crash the dashboard by opening the context menu
before an applet entry had been selected for the first time (e.g.
immediately after startup) and selecting one of the Group CCB
actions, as the enable update slot would not have been run.
2021-03-21 02:04:24 +00:00
David Nadlinger
6fd088e339
test/lit: Fix invalid type inference test
...
This broke after b8cd163978
, but
is invalid code to start with; this would have previously
crashed the code generator had the code actually been compiled.
(Allowing implicit conversion to bool would be a separate debate.)
2021-03-21 01:46:52 +00:00
David Nadlinger
be4669d7a5
compiler: Fix crash with try/finally and stack-return function calls
...
The previous code could have never worked as-is, as the result slot
went unused, and it tried to append the load instruction to the
block just terminated with the invoke.
GitHub: Fixes #1506 , #1531 .
2021-03-21 01:31:26 +00:00
David Nadlinger
1f40f3ce15
compiler: Map host numpy.bool_ values to TBool
...
Since we don't implement any integer-like operations for TBool
(addition, bitwise not, etc.), TBool is currently neither
strictly equivalent to builtin bool nor numpy.bool_, but through
very obvious compiler errors (operation not supported) rather than
silently different runtime behaviour.
Just mapping both to TBool thus is a huge improvement over the
current behaviour (where numpy.False_ is a true-like object). In
the future, we could still implement more operations for TBool,
presumably following numpy.bool_ rather than the builtin type,
just like builtin integers get translated to the numpy-like
TInt{32,64}.
GitHub: Fixes #1275 .
2021-03-20 00:54:41 +00:00
David Nadlinger
b8cd163978
compiler: Fix type inference for "ternary" if expressions
...
Previously, any type would be accepted for the test expression,
leading to internal errors in the code generator if the passed
value wasn't in fact a bool.
2021-03-20 00:27:25 +00:00
David Nadlinger
888696f588
coredevice: Fix RPC typing for bool lists/arrays
...
GitHub: Fixes #1635 .
2021-03-20 00:03:10 +00:00
Leon Riesebos
d04bcd8754
add get_*() functions to ad9910, ad9912, and urukul. closes #1616
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-03-15 13:06:24 +08:00
Leon Riesebos
c22f731a61
added typing and reformatted driver for ad9910, ad9912, and urukul
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-03-15 13:06:24 +08:00
David Nadlinger
5ba22c11c3
compiler: Change type inference rules for empty array() calls
...
array([...]), the constructor for NumPy arrays, currently has the
status of some weird kind of macro in ARTIQ Python, as it needs
to determine the number of dimensions in the resulting array
type, which is a fixed type parameter on which inference cannot
be performed.
This leads to an ambiguity for empty lists, which could contain
elements of arbitrary type, including other lists (which would
add to the number of dimensions).
Previously, I had chosen to make array([]) to be of completely
indeterminate type for this reason. However, this is different
to how the call behaves in host NumPy, where this is a well-formed
call creating an empty 1D array (or 2D for array([[], []]), etc.).
This commit adds special matching for (recursive lists of) empty
ListT AST nodes to treat them as scalar dimensions, with the
element type still unknown.
This also happens to fix type inference for embedding empty 1D
NumPy arrays from host object attributes, although multi-dimensional
arrays will still require work (see GitHub #1633 ).
GitHub: Fixes #1626 .
2021-03-14 22:48:43 +00:00
David Nadlinger
c707ccf7d7
compiler: Properly implement NumPy array slicing
...
Strided slicing of one-dimensional arrays (i.e. with non-trivial
steps) might have previously been working, but would have had
different semantics, as all slices were copies rather than a view
into the original data.
Fixing this in the future will require adding support for an index
stride field/tuple to our array representation (and all the
associated indexing logic).
GitHub: Fixes #1627 .
2021-03-14 20:02:59 +00:00
David Nadlinger
557671b7db
compiler: Fix type inference in slice expressions
...
This was a long-standing issue affecting both lists and
the new NumPy array implementation, just caused by the
generic inference passes not being run on the slice
subexpressions (and thus e.g. ints not being monomorphized).
GitHub: Fixes #1632 .
2021-03-14 18:46:28 +00:00
David Nadlinger
75c255425d
compiler: Linguistically untangle comment [nfc]
2021-03-14 18:40:21 +00:00
Leon Riesebos
b8f4c6b9bb
added test case for get_experiment() with nested class
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-02-28 14:26:44 +08:00
Leon Riesebos
1deaa758ce
get_experiment() is able to get nested experiment classes using dots in class names.
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-02-28 14:26:44 +08:00
Leon Riesebos
3c68223337
replaced deprecated inspect.getargspec() with inspect.getfullargspec()
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-02-28 14:25:05 +08:00
Leon Riesebos
cd7f9531d7
added abstract describe method to ScanObject
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-02-28 14:25:05 +08:00
92fd705990
increase memory allocated to comms CPU
...
See discussion in #1612 .
2021-02-21 19:06:12 +08:00
8deb269b9a
update major version
2021-02-17 16:18:05 +08:00
14d464b4cf
update copyright year
2021-02-17 15:52:08 +08:00
Etienne Wodey
3cd96a951a
master: refactor experiments enumeration, use tools.get_experiment
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-02-13 10:06:12 +08:00
Etienne Wodey
2ca9b64ba1
test: add unit tests for tools.file_import and tools.get_experiment
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-02-13 10:06:12 +08:00
d33a206f04
eem: fix Urukul QSPI after 9ef5717de8
(2)
2021-02-12 13:17:48 +08:00
3844cde97b
jsonschema: validate hw_dev depending on target
2021-02-12 11:09:01 +08:00
22ce5b0299
eem: fix Urukul QSPI after 9ef5717de8
2021-02-12 10:59:53 +08:00
Etienne Wodey
af411de639
tools/file_import: simplify, remove deprecated load_module() call
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-02-10 16:03:31 +08:00
e54dd08821
metlino,sayma: adapt to new EEM API
...
This also enables 4X SERDES TTLs.
2021-02-10 15:32:10 +08:00
547254e89e
eem_7series: pass through kwargs
2021-02-10 15:31:49 +08:00
49299c00a9
eem: enable DCI for LVDS TTL
2021-02-10 15:31:25 +08:00
9ef5717de8
eem: support different I/O standards in EEM slots
2021-02-10 15:31:05 +08:00
Drew
48a1c305c1
master: fix DeprecationWarning on logger.warn
...
Resolves error message shown.
The following error message is shown when worker_impl.py:199 is run:
```
WARNING:worker(RID,EXPERIMENT):py.warnings:/nix/store/77sw4p03cb7rdayx86agi4yqxh5wq46b-python3.7-artiq-5.7141.1b68906/lib/python3.7/site-packages/artiq/master/worker_impl.py:199: DeprecationWarning: The 'warn' function is deprecated, use 'warning' instead
logging.warn(message)
```
2021-02-10 15:27:22 +08:00
461199b903
kasli_generic: warn if min_artiq_version is not met
2021-02-10 15:26:15 +08:00
4b2ed67dd7
coredevice_generic.schema.json: add "min_artiq_version"
2021-02-10 15:26:15 +08:00
cf9cf0ab6f
ttl_serdes_7series: add dci (HP bank) support
2021-02-07 22:32:18 +08:00
997a48fb31
ttl_serdes_ultrascale: fix, add dummy dci argument
2021-02-07 22:31:46 +08:00
bbe0c9162a
ttl_serdes_ultrascale: cleanup
2021-02-07 22:00:33 +08:00
3572e2a9c7
ttl_serdes_7series: fix
2021-02-07 21:41:13 +08:00
88c212b84f
ttl_serdes_7series: cleanup
2021-02-07 21:33:21 +08:00
db25f4e8f7
ttl_serdes_7series: use simpler I/O buffers
...
In theory equivalent with these parameters.
2021-02-07 20:10:37 +08:00
6bd9691ba8
gateware: remove TTL dead code
2021-02-07 19:58:02 +08:00
bfacd1e5b3
eem: fix Grabber cc_0-2 signal definitions
2021-02-07 18:01:05 +08:00
f7a33a1f99
gateware: make 7-series EEM handling functions shareable
2021-02-07 14:34:26 +08:00
1213f78ee9
jsonschema: support kasli_soc
2021-02-07 13:39:01 +08:00
2f5ea67b69
Merge pull request #1596 from airwoodix/fix-adf5356-init
...
coredevice/adf5356: fix initial device detection
2021-02-02 18:20:08 +01:00
Etienne Wodey
d691b05d78
coredevice/mirny: better error handling for clk_sel
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-02-02 16:23:47 +01:00
Etienne Wodey
78e1b9f8e5
sinara_tester/mirny: remove hw_rev checking fixup code
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-01-29 18:47:40 +01:00
Etienne Wodey
6f8e788620
coredevice/mirny: support human readable clk_sel
...
In init(), read hw_rev to derive clk_sel code from user string.
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-01-29 18:46:47 +01:00
Etienne Wodey
a8bc98a77b
coredevice/adf5356: fix initial device detection
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-01-28 18:29:40 +01:00
David Nadlinger
f9872bb7b8
coredevice: Handle prematurely closed sockets in comm_kernel receive loop
...
recv() returns 0 instead of data if the socket has already
been closed. This is translated into a zero-length list on
the Python layer. Previously, the code would enter an
infinite loop if the socket was closed while attempting
to receive data.
2021-01-26 18:10:49 +08:00
David Nadlinger
f1fd42ea98
coredevice: Re-enable TCP keepalive
...
This partially reverts commit b5e1bd3fa2
,
which had removed keepalive. This, however, led to experiments
hanging forever if the core device had dropped the connection
(e.g. to a kernel CPU panic, or the device being rebooted).
The chosen keepalive settings are fairly conservative (with the
10 s timeout) to avoid any possible interaction with smoltcp's
3 s ARP try interval (see GitHub issue #1150 ), even though this
should be a non-issue now due to the larger ARP cache.
2021-01-26 18:10:49 +08:00
8148fdb8a7
use device endian for core device protocols ( #1591 )
2021-01-22 16:33:21 +08:00
a0fd5261ea
kc705: cleanup
2021-01-22 11:11:13 +08:00
7c4eed7a11
kc705: simplify DRTIO master & satellite
...
* KC705 master: user can no longer choose whether or not the SMA acts as the 2nd DRTIO channel; SFP and SMA now act as the 1st and 2nd channel respectively by default.
* KC705 satellite: user should now use `--sma` to enable using the SMA as the satellite channel; SFP acts as the satellite channel by default.
2021-01-22 11:11:13 +08:00
David Nadlinger
1e443a3aea
coredevice: Reuse Target.little_endian for protocol endianness [nfc]
2021-01-21 09:11:54 +01:00
ec72eeda46
coredevice: use device endian for kernel and RPC
2021-01-21 09:07:48 +01:00
3832b261b1
firmware: optimize integer array/list rpc
2021-01-21 09:05:17 +01:00
88b14082b6
drtio/transceiver/gtx: delete obsolete modules
2021-01-20 15:05:32 +08:00
9daf77bd58
kc705: add multichannel support on satellite
...
* Two DRTIO channels (i.e. satellite and repeater) are enabled by default.
* User can choose either the SFP or SMA as the satellite channel (by passing `--drtio-sat sfp` or --drtio-sat sma` to the argparser), and the unchosen would become the repeater channel.
2021-01-20 15:05:32 +08:00
52afd4ef6b
kc705: add GTX multilane support, add multichannel support on master
...
* One DRTIO master channel is enabled by default.
* User can set the SMA as the 2nd master channel (by passing --drtio-sma to the argparser).
* Multi-channel (i.e. with repeaters) on KC705 satellite is supported but has not been implemented yet.
2021-01-20 15:05:32 +08:00
f6d39fd6ba
kc705: revive DRTIO master with updated syntax
...
* KC705 master variant now uses Si5324 as synthesiser.
* Multi-channel has not been implemented yet.
2021-01-20 15:05:31 +08:00
f25e86e934
kc705: revive DRTIO satellite with updated syntax, update GTX
...
* Multi-channel has not been implemented yet.
2021-01-20 11:25:38 +08:00
David Nadlinger
c229e76d07
compiler: Add accidentally omitted note to invalid RPC type diagnostic
...
Might be a minor quality-of-life employment, but there
isn't a test case for this anyway.
2021-01-20 01:49:16 +01:00
261870bdee
phaser: fix oscillator rtio address for even base addresses
...
close #1580
2021-01-19 16:56:50 +01:00
David Nadlinger
f11aef74b4
gui: Add context menu entry to close all applets
...
This is occasionally very useful if a large number of
applets were left open (e.g. spawned via CCB).
2021-01-17 11:56:03 +01:00
c675488a99
reorganize JSON schema files
2021-01-16 10:43:14 +08:00
c6807f4594
kasli_generic: validate description against schema, use defaults from schema
2021-01-16 10:35:23 +08:00
45b5cfce05
gateware: add a kasli_generic.schema.json
2021-01-16 10:35:23 +08:00
David Nadlinger
9b39b1e328
test: Add coredevice tests for matrix multiplication
...
Also includes a regression test specifically for
mixing multiple types in one kernel.
2021-01-12 03:02:07 +01:00
David Nadlinger
f0284b2549
compiler: Fix collision of environments in matmult implementations
...
GitHub: Fixes #1578 .
2021-01-12 03:02:07 +01:00
David Nadlinger
362f8ecb69
compiler: Add test for disallowing type-unstable array-assign binops
2021-01-12 03:02:07 +01:00
David Nadlinger
96692791cf
compiler: Implement assigning binops for arrays
...
GitHub: Fixes #1579 .
2021-01-12 03:02:07 +01:00
5b5db1433b
Revert "compiler: enabled vectorize option"
...
This reverts commit 636898c302
.
2021-01-11 19:43:12 +08:00
636898c302
compiler: enabled vectorize option
2021-01-11 16:31:24 +08:00
6a5f5088e2
frontend: sinara_tester: add mirny test
...
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2021-01-05 17:01:01 +08:00
cff7bcc122
Merge branch 'master' ( 43be383c86
) into k7-drtio
2020-12-31 13:30:46 +08:00
dc7addf394
Revert "drtio: remove KC705/GTX support"
...
This reverts commit ebdbaaad32
.
2020-12-31 13:29:50 +08:00
43be383c86
kasli v2.0: drive TX_DISABLE low on all SFPs ( fixes #1570 )
...
This was the same problem as #1508 but on SFP1..3
2020-12-23 00:10:12 +08:00
43ecb3fea6
sayma: add comments about CPLL line rate on KU GTH
2020-12-19 17:05:20 +08:00
8cd794e9f4
jesd204_tools: use new syntax from jesd204b core
...
* requires jesd204b changes as in https://github.com/HarryMakes/jesd204b/tree/gth
2020-12-19 17:05:20 +08:00
Aadit Rahul Kamat
19f75f1cfd
artiq_browser: update h5py api call
...
Signed-off-by: Aadit Rahul Kamat <aadit.k12@gmail.com>
2020-12-17 14:23:16 +08:00
a017dafee6
ddb_template: mirny_cpld: add default value
...
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2020-12-15 11:00:59 +08:00
73271600a1
jdcg: STPL tests now perform after DAC initialization
2020-12-14 18:03:31 +08:00
occheung
3f631c417d
artiq_ddb_template: mirny_cpld: add refclk, clk_sel args
...
Signed-off-by: occheung <occheung@connect.ust.hk>
2020-12-14 13:38:20 +08:00
occheung
33d39b261a
artiq_ddb_template: mirny_cpld: rename adf5355 to adf5356
...
Signed-off-by: occheung <occheung@connect.ust.hk>
2020-12-14 13:38:20 +08:00
4b10273a2d
gui: quamash -> qasync
2020-12-12 21:59:25 +08:00
1ce505c547
coredevice: remove obsolete watchdog code ( #1458 )
2020-12-08 13:25:39 +08:00
072053c3b2
compiler: remove obsolete watchdog code ( #1458 )
2020-12-08 13:25:08 +08:00
ccdc741e73
sayma_amc: fix --sfp argument
2020-12-07 18:02:36 +08:00
33285253fb
Merge pull request #1558 from quartiq/phased_ddb_fix
...
Phased ddb fix
2020-12-04 16:38:40 +01:00
Leon Riesebos
3b2c225fc4
allow dashboard to close if no connection can be made to moninj
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-12-04 23:00:23 +08:00
Leon Riesebos
94271504dd
Added RuntimeError to prelude to make the name available in kernels
...
closes #1477
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-12-04 22:59:08 +08:00
SingularitySurfer
9b4b550f76
5 is correct.
2020-12-04 14:49:30 +00:00
SingularitySurfer
cba631610c
fixed phaser number of rtio channels
2020-12-04 14:40:59 +00:00
6ceb3f3095
Merge pull request #1551 from quartiq/tester_tweaks
...
modified urukul instructions in sinara tester script
2020-11-26 16:22:44 +01:00
eda4850f64
Revert "fixes with statement with multiple items"
...
This reverts commit 88d346fa26
.
2020-11-22 11:57:22 +08:00
8e46c3c1fd
Revert "compiler: fix incorrect with behavior"
...
This reverts commit fe6115bcbb
.
2020-11-22 11:57:21 +08:00
SingularitySurfer
0605267424
modified urukul instructions
2020-11-19 12:20:34 +00:00
3e38833020
ad9910: fix turns_to_pow
return-type on host
...
When run on the host, the `turns_to_pow` retrun-type is numpy.int64.
Sensibly, the compiler does not attempt to convert `numpy.int64` to `int32`.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2020-11-13 18:54:47 +01:00
David Nadlinger
9ff47bacab
compiler: Provide libm special functions (erf, Bessel functions, …)
...
Tests hard-depend on SciPy to make sure this is exercised
during CI.
2020-11-11 19:15:30 +01:00
David Nadlinger
a5dcd86fb8
test/lit: Rename array
to avoid conflict with standard library
...
The old name created problems if a test dependency (e.g. NumPy/SciPy)
ends up importing the system `array` module internally somewhere.
2020-11-11 17:42:53 +01:00
David Nadlinger
d95e619567
compiler: Implement binary NumPy math functions (arctan2, …)
...
The bulk of the diff is just factoring out the implementation
for binary arithmetic implementations, to be reused for binary
function calls.
2020-11-11 01:35:28 +01:00
David Nadlinger
bc6fbecbda
compiler, firmware: Do not expose abort() to kernels
...
This was only exposed for the assert implementation, and
does not exist on Zynq.
2020-11-10 20:40:18 +01:00
David Nadlinger
292043a0a7
compiler: Raise AssertionErrors instead of abort()ing on all targets
2020-11-10 20:40:18 +01:00
Leon Riesebos
d8a5a8f568
fixed value scaling issue for the center scan gui widget
...
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-11-10 18:42:18 +01:00
Etienne Wodey
dbcac62fd0
coredevice: adf5356: fix/adjust docs
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
e8730a7e14
coredevice: adf5356: add test for failed PLL lock
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
3844123c13
coredevice: adf5356: add enable/disable and power setting for outA
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
61dc2b8b64
coredevice: adf5356: add some tests
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
b200465cce
coredevice: adf5355: rename to adf5356
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
d433f6e86d
coredevice: adf5355: more general PLL parameters calculation
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
b856df7c35
coredevice: adf5355: cleanup, style
2020-11-10 10:49:22 +08:00
Etienne Wodey
211500089f
coredevice: mirny/adf5355: add basic high-level interface
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
David Nadlinger
4f311e7448
compiler: Raise exception on failed assert()s rather than panic
...
This allows assert() to be used on Zynq, where abort() is not
currently implemented for kernels. Furthermore, this is arguably
the more natural implementation of assertions on all kernel targets
(i.e. where embedding into host Python is used), as it matches host
Python behavior, and the exception information actually makes it to
the user rather than leading to a ConnectionClosed error.
Since this does not implement printing of the subexpressions, I
left the old print+abort implementation as default for the time
being.
The lit/integration/instance.py diff isn't just a spurious change;
the exception-based assert implementation exposes a limitation in
the existing closure lifetime tracking algorithm (which is not
supposed to be what is tested there).
GitHub: Fixes #1539 .
2020-11-10 00:51:24 +01:00
David Nadlinger
f0ec987d23
test/coredevice: Avoid NumPy deprecation warning
...
Jagged arrays are no longer silently inferred as dtype=object,
as per NEP-34.
The compiler ndarray (re)implementation is unchanged, so the
test still fails.
2020-11-09 23:53:50 +01:00
ea95d91428
wrpll: separate collector reset
2020-11-09 17:57:13 +08:00
David Nadlinger
a97b4633cb
compiler: Add math_fns module docstring [nfc]
2020-10-31 19:06:00 +01:00
Etienne Wodey
ecef5661ce
coredevice/phaser: fix typos in docstring
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-10-29 20:27:08 +01:00
David Nadlinger
d672d2fc35
test/coredevice: Fixup NumPy references
...
This fixes a copy/paste refactoring mistake from d5f90f6c9
.
2020-10-20 02:49:05 +02:00
David Nadlinger
d5f90f6c9f
compiler: Fix quoting of multi-dimensional arrays
...
GitHub: Fixes m-labs/artiq#1523 .
2020-10-20 01:40:14 +02:00
David Nadlinger
d161fd5d84
compiler: Properly expand dimensions for array([]) with ndarray elements
...
This matches host NumPy behaviour (and, in either case, was
previously broken, as it still continued past the array element
type).
2020-10-20 01:40:14 +02:00
David Nadlinger
94489f9183
compiler: Fix inference order issue in multi-dim. subscript
...
This will be caught by the test for an imminent array quoting fix.
2020-10-20 01:40:14 +02:00
a9dd0a268c
Merge pull request #1533 from m-labs/phaser
...
Phaser
2020-10-19 09:30:12 +02:00
30d1acee9f
fastlink: fix fastino style link
2020-10-18 20:43:21 +00:00
d98357051c
add ref data
2020-10-18 20:43:21 +00:00
139385a571
fastlink: add fastino test
2020-10-18 17:11:09 +00:00
d185f1ac67
wrpll: fix mulshift (2)
2020-10-17 00:32:02 +08:00
3f076bf79b
wrpll: fix mulshift
2020-10-16 22:05:37 +08:00
90017da484
firmware: remove obsolete watchdog code ( #1458 )
2020-10-15 18:38:00 +08:00
59703ad31d
test: stop checking for artiq_netboot
2020-10-15 16:18:56 +08:00
7a5996ba79
artiq_netboot: moved to git.m-labs.hk/M-Labs/artiq-netboot
2020-10-15 16:14:22 +08:00
57ee57e7ea
runtime: fix metlino si5324 init (2)
2020-10-14 18:41:56 +08:00
ac35548d0f
runtime: fix metlino si5324 init
2020-10-14 12:57:25 +08:00
35c61ce24d
si5324: unify N31 settings when used as synthesizer
...
Closes #1528
2020-10-12 14:45:52 +08:00
hartytp
a058be2ede
wrpll: fix test_helper_collector
2020-10-08 19:43:12 +08:00
d0d0a02fd0
test: added lit test for new error messages
2020-10-08 19:38:26 +08:00
e9988f9d3b
compiler: error message for custom operations
...
Emit error messages for custom comparison and inclusion test,
instead of compiler crashing.
2020-10-08 19:38:26 +08:00
db62cf2abe
wrpll: convert tests to self-checking unittests
2020-10-08 18:38:01 +08:00
07d43b6e5f
wrpll: babysit Vivado DSP retiming
...
Design now passes timing.
2020-10-08 17:51:27 +08:00
7dfb4af682
kasli2: work around vivado clock constraint problem
2020-10-08 16:31:39 +08:00
96a5df0dc6
kasli2: add false path constraint for wrpll helper clock
2020-10-08 16:19:44 +08:00
6248970ef8
wrpll: clean up matlab comparison test
2020-10-08 15:40:15 +08:00
hartytp
cd8c2ce713
wrpll: add test to compare collector+filter against Matlab simulation
2020-10-08 15:36:56 +08:00
hartytp
d780faf4ac
wrpll.si549: initialize the clock divider to a sensible value
2020-10-08 15:32:27 +08:00
hartytp
e6ff2ddc32
wrpll: add more diagnostics in firmware and adapt to recent gateware changes
2020-10-08 15:32:27 +08:00
hartytp
7d7be6e711
wrpll.core: move collector into helper CD so we can get tags out while the filters are reset
2020-10-08 15:32:27 +08:00
3fa5d0b963
wrpll: clean up sign extension
2020-10-08 15:32:27 +08:00
hartytp
87911810d6
wrpll.core: add CSRs to monitor the collector outputs
2020-10-08 15:32:27 +08:00
hartytp
f2f942a8b4
wrpll.ddmtd: remove CSRs from DDMTD
...
We will gather then from the collector output so we can get all tags on the same cycle
2020-10-08 15:32:27 +08:00
hartytp
85bb641917
wrpll.ddmtd: fix first edge deglitcher
...
The blind counter should be held in reset whenever the input is high,
not just when there is a rising edge (otherwise the counter runs down
during the main pulse and can then re-trigger on jitter from the falling edge)
2020-10-08 15:32:27 +08:00
hartytp
f3cd0fc675
wrpll.filters: the helper clipping threshold is currently way too low. Move clipping after the bitshift to increase a bit.
...
TODO: think about this and pick a sensible threshold (and also think about integrator anti windup)
2020-10-08 15:32:27 +08:00
hartytp
e5e648bde1
wrpll: add bit shift for collector helper output
2020-10-08 15:32:27 +08:00
hartytp
c9ae406ac6
wrpll: change the DDMTD helper frequency to match CERN, improve docs
2020-10-08 15:32:27 +08:00
hartytp
f6f6045f1a
wrpll.thls: fix make
2020-10-08 15:32:27 +08:00
hartytp
b44b870452
wrpll.filters: update to match Weida's MatLab simulations
2020-10-08 15:32:27 +08:00
hartytp
e9ab434fa7
wrpll.core: update for modified collector
2020-10-08 15:32:27 +08:00
17c952b8fb
wrpll: style
2020-10-08 15:32:27 +08:00
hartytp
ebb7ccbfd1
wrpll: document DDMTD collector and fix unwrapping
2020-10-08 15:32:27 +08:00
66401aee9c
dashboard: cleanup import
2020-10-07 19:24:54 +08:00
fe6115bcbb
compiler: fix incorrect with behavior
2020-10-07 18:59:35 +08:00
02f46e8b79
Fixes none to bool coercion
...
Fixes #1413 and #1414 .
2020-10-07 15:34:24 +08:00
88d346fa26
fixes with statement with multiple items
...
Closes #1478
2020-10-07 15:33:34 +08:00
9214e0f3e2
firmware: fix Si5324 CKIN selection on Kasli 2.0
...
https://github.com/sinara-hw/Kasli/issues/82#issuecomment-702129805
2020-10-02 20:35:32 +08:00
eecd97ce4c
phaser: debug and comments
2020-09-27 17:15:16 +00:00
c453c24fb0
phaser: tweak slacks
2020-09-26 21:16:08 +00:00
6c8bddcf8d
phaser: tune sync_dly
2020-09-26 21:13:00 +00:00
569e5e56cd
phaser: autotune and fix fifo_offset
2020-09-26 20:37:16 +00:00
2fba3cfc78
phaser: debug init, systematic bring-up
2020-09-25 20:54:59 +00:00
fec2f8b763
phaser: increase slack for iotest
2020-09-24 10:59:22 +00:00
a65239957f
ad53xx: distinguish errors
2020-09-24 10:52:03 +02:00
6e6480ec21
phaser: tweak slacks and errors, identify trf
2020-09-24 08:38:30 +00:00
03d5f985f8
phaser: another artiq-python signed integer quirk
2020-09-23 15:40:54 +00:00
ef65ee18bd
dac34h84: unflip spectrum, clear nco
2020-09-23 08:35:56 +00:00
50b4eb4840
Merge branch 'master' into phaser
...
* master: (26 commits)
fastino: documentation and eem pass-through
kasli2: forward sma_clkin to si5324
test: relax test_dma_playback_time on Zynq
rpc: fixed _write_bool
fastino: document/cleanup
build_soc: remove assertion that was used for test runs
metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516 )
Revert "test: temporarily disable test_async_throughput"
build_soc: rename identifier_str to gateware_identifier_str
test: relax loopback gate timing
test: temporarily disable test_async_throughput
test: relax test_pulse_rate on Zynq
test: skip NonexistentI2CBus if I2C is not supported
build_soc: override identifier_str only for gateware
examples: add Metlino master, Sayma satellite with TTLOuts via FMC
sayma_amc: add support for 4x DIO output channels via FMC
fmcdio_vhdci_eem: fix pin naming
build_soc: add identifier_str override option
RPC: optimization by caching
test: improved test_performance
...
2020-09-22 16:02:25 +00:00
c55f2222dc
fastino: documentation and eem pass-through
...
* Repeat information about matching log2_width a few times
in the hope that people read it. #1518
* Pass through log2_width in kasli_generic json. close #1481
* Check DAC value range. #1518
2020-09-22 17:58:53 +02:00
ad096f294c
phaser: add hitl test exercising the complete API
2020-09-22 15:35:19 +00:00
85d16e3e5f
phaser: tweaks
2020-09-22 15:27:38 +00:00
5c76f5c319
tester: add phaser
2020-09-22 14:36:49 +00:00
fd5e221898
phaser: dac and trf register maps, init code
2020-09-22 14:08:39 +00:00
3e036e365a
phaser: nco, settings and init tweaks
2020-09-22 09:52:49 +00:00
fdb2867757
phaser: fewer iotest patterns
2020-09-21 17:06:26 +02:00
d730851397
phaser: elaborate init sequence, more tests
2020-09-21 15:05:29 +00:00
f0959fb871
phaser: iotest early, check_alarms
2020-09-17 14:13:58 +00:00
b15e388b5f
ad53xx: distinguish errors
2020-09-17 14:13:10 +00:00
29c940f4e3
kasli2: forward sma_clkin to si5324
2020-09-17 16:53:43 +08:00
868a9a1f0c
phaser: new multidds
2020-09-16 14:06:38 +00:00
c18f515bf9
phaser: rework rtio channels, sync_dly, init()
2020-09-16 12:23:07 +00:00
f3b0398720
phaser: n=2, m=16, sync_dly
2020-09-16 09:19:15 +00:00
9b58b712a6
phaser: doc tweaks
2020-09-15 12:35:26 +00:00
ff57813a9c
phaser: init [wip]
2020-09-15 08:46:47 +00:00
07418258ae
phaser: init [wip]
2020-09-15 08:46:10 +00:00
3a79ef740b
phaser: work around integer size
2020-09-15 08:46:10 +00:00
b449e7202b
phaser: rework docs
2020-09-15 08:46:10 +00:00
b619f657b9
phaser: doc tweaks
2020-09-12 19:59:49 +02:00
c3728678d6
phaser: document, elaborate comments, some fixes
2020-09-12 17:35:14 +00:00
e505dfed5b
phaser: refactor coredevice driver
2020-09-12 14:17:40 +00:00
fdd2d6f2fb
phaser: SI methods
2020-09-12 11:02:37 +00:00
bff611a888
test: relax test_dma_playback_time on Zynq
2020-09-11 11:21:45 +08:00
4e24700205
phaser: spelling
2020-09-09 16:52:52 +00:00
8aaeaa604e
phaser: share_lut
2020-09-07 16:06:35 +00:00
e69bb0aeb3
phaser: add comment about get_dac_data
2020-09-07 16:06:16 +00:00
6195b1d3a0
rpc: fixed _write_bool
...
Closes #1519
2020-09-04 13:49:22 +08:00
56aa22caeb
fastino: document/cleanup
...
* added documentation on `update`/`hold` mechanism
* mask machine unit values
* cleanup coredevice driver
close #1518
2020-09-03 17:44:26 +02:00
1b475bdac4
build_soc: remove assertion that was used for test runs
2020-09-03 20:24:18 +08:00
458a411320
metlino_sayma_ttl: Fix RTIO frequency & demo code ( #1516 )
2020-09-03 15:08:31 +08:00
47e88dfcbe
Revert "test: temporarily disable test_async_throughput"
...
This reverts commit f0289d49ab
.
2020-09-03 14:19:55 +08:00
002a71dd8d
build_soc: rename identifier_str to gateware_identifier_str
2020-09-02 00:00:57 +08:00
4398a2d5fa
test: relax loopback gate timing
2020-09-01 17:50:09 +08:00
f0289d49ab
test: temporarily disable test_async_throughput
...
M-Labs/artiq-zynq#104
2020-09-01 17:49:40 +08:00
8d5dc0ad2a
test: relax test_pulse_rate on Zynq
2020-09-01 17:08:26 +08:00
f294d039b3
test: skip NonexistentI2CBus if I2C is not supported
2020-09-01 16:47:04 +08:00
91df3d7290
build_soc: override identifier_str only for gateware
2020-09-01 10:46:39 +08:00
3d84135810
examples: add Metlino master, Sayma satellite with TTLOuts via FMC
2020-08-31 16:21:45 +08:00
dfbf3311cb
sayma_amc: add support for 4x DIO output channels via FMC
2020-08-31 16:21:45 +08:00
1ad9deaf91
fmcdio_vhdci_eem: fix pin naming
2020-08-31 16:21:45 +08:00
45ae6202c0
build_soc: add identifier_str override option
...
Signed-off-by: Stephan Maka <stephan@spaceboyz.net>
2020-08-31 11:48:58 +08:00
272dc5d36a
phaser: documentation
2020-08-28 16:36:44 +00:00
b2572003ac
RPC: optimization by caching
...
This reduced the calls needed for socket send/recv.
2020-08-28 14:58:34 +08:00
69f0699ebd
test: improved test_performance
...
1. Added tests for small payload.
2. Added statistics.
2020-08-28 14:58:34 +08:00
7cf974a6a7
comm_kernel: fix typo
2020-08-28 12:25:23 +08:00
68bfa04abb
phaser: trf readback strobe spi changes
2020-08-27 15:31:42 +00:00
96fc248d7c
phaser: synchronize multidds to frame
2020-08-27 14:28:19 +00:00
c10ac2c92a
phaser: add trf, duc, interfaces, redo body assembly, use more natrual iq ordering (i lsb)
2020-08-27 14:26:09 +00:00
e5e2392240
phaser: wire up multidds
2020-08-26 17:12:41 +00:00
d1be1212ab
phaser: coredevice shim, dds [wip]
2020-08-26 15:10:50 +00:00
aac2194759
Ported rpc changes to or1k
2020-08-26 14:17:06 +08:00
7181ff66a6
compiler: improved rpc performance for list and array
...
1. Removed duplicated tags before each elements.
2. Use numpy functions to speedup parsing.
2020-08-26 14:17:06 +08:00
cfddc13294
test: fixed test_performance
...
Added more tests and use normal rpc instead of async rpc.
Async RPC does not represent the real throughput which is limited by the
hardware and the network. Normal RPC which requires a response from the
remote is closer to real usecases.
2020-08-26 14:17:06 +08:00
20fcfd95e9
phaser: coredevice shim, readback fix
2020-08-24 15:46:31 +00:00
bcefb06e19
phaser: ddb template, split crc
2020-08-24 14:51:50 +00:00
11c9def589
phaser: readback delay, test fastlink
2020-08-24 14:49:36 +00:00
Paweł Kulik
eb350c3459
Drive SFP0 TX_DISABLE low during startup (as was in Kasli v1.1). Fixes Ethernet on SFP modules with pullup on this line.
...
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2020-08-24 21:39:53 +08:00
63e4b95325
fastlink: rework crc injection
2020-08-23 19:41:13 +00:00
a27a03ab3c
fastlink: fix crc vs data width
2020-08-23 19:02:50 +00:00
7e584d0da1
fastino: use fastlink
2020-08-22 11:56:23 +00:00
3e99f1ce5a
phaser: refactor link
2020-08-22 11:56:23 +00:00
a34a647ec4
phaser: refactor fastlink
2020-08-22 11:56:23 +00:00
aa0154d8e2
phaser: initial
2020-08-22 11:56:23 +00:00
5f6aa02b61
gui: unbreak background
2020-08-14 13:14:45 +08:00
David Nadlinger
69718fca90
gui: Improve fuzzy-select heuristics
...
Even though the code already used non-greedy wildcards before,
it would not find the shortest match, as earlier match starts
would still take precedence.
This could possibly be sped up a bit in CPython by doing
everything inside re using lookahead-assertion trickery, but the
current code is already imperceptibly fast for hundreds of
choices.
2020-08-14 02:13:45 +01:00
a46573e97a
Revert "test: set uart log level to INFO for DMA tests"
...
This reverts commit b05cbcbc24
.
2020-08-13 12:44:33 +08:00
b05cbcbc24
test: set uart log level to INFO for DMA tests
2020-08-13 12:24:57 +08:00
48008eaf5f
test: omit unavailable math functions on OR1K
2020-08-12 15:01:13 +08:00
d8cd5023f6
runtime: expose more libm functions
2020-08-12 13:36:06 +08:00
David Nadlinger
c6f0c4dca4
test/coredevice: Ignore jagged 2D array embedding test for now
2020-08-10 00:23:38 +01:00
David Nadlinger
daf57969b2
compiler: Do not expand strings into TInt(8)s in array()
2020-08-09 23:46:45 +01:00
David Nadlinger
778f2cf905
compiler: Fix numpy.full, implement for >1D
2020-08-09 23:46:45 +01:00
David Nadlinger
53d64d08a8
compiler: Fix multi-dim slice error message test, tweak wording
2020-08-09 23:14:56 +01:00
David Nadlinger
d35f659d25
compiler: Add additional math fns available from Rust libm
2020-08-09 20:09:43 +01:00
David Nadlinger
a39bd69ca4
compiler: Implement numpy.rint() using llvm.round()
2020-08-09 19:44:58 +01:00
David Nadlinger
ae47d4c0ec
test/coredevice: Add host/device consistency checks for NumPy math
2020-08-09 19:15:43 +01:00
David Nadlinger
8e262acd1e
compiler: Slight array op implementation cleanup [nfc]
...
array_unaryop_funcs was never used; since the mangled names
are unique, a single dictionary would be nicer for overrides
anyway.s
2020-08-09 18:58:01 +01:00
David Nadlinger
33d931a5b7
compiler: Implement multi-dimensional indexing of arrays
...
This generates rather more code than necessary, but has
the advantage of automatically handling incomplete
multi-dimensional subscripts which still leave arrays
behind.
2020-08-09 17:08:43 +01:00
David Nadlinger
b00ba5ece1
compiler: Support explicit array(…, dtype=…) syntax
2020-08-09 17:08:43 +01:00
David Nadlinger
ad34df3de1
compiler: Support numpy.float
...
This would previously crash the compiler.
2020-08-09 17:08:43 +01:00
David Nadlinger
8783ba2072
compiler/firmware: RPCs for ndarrays
2020-08-09 17:08:43 +01:00
David Nadlinger
5472e830f6
compiler: Assume array()s are always rectangular
2020-08-09 03:54:42 +01:00
David Nadlinger
8eddb9194a
test/lit: Add smoke test for math function broadcasting
2020-08-09 03:54:42 +01:00
David Nadlinger
1c645d8857
compiler: Unbreak quoting of 1D ndarrays
...
Lists and arrays no longer have the same representation all
the way through codegen, as used to be the case.
This could/should be made more efficient later, eliding the
temporary copies.
2020-08-09 03:54:42 +01:00
David Nadlinger
df8f1c5c5a
compiler: Annotate math functions nounwind/nowrite
2020-08-09 03:54:42 +01:00
David Nadlinger
cc00ae9580
compiler: Implement broadcasting of math functions
2020-08-09 03:54:42 +01:00
David Nadlinger
be7d78253f
compiler: Implement 1D-/2D- array transpose
...
Left generic transpose (shape order inversion) for now, as that
would be less ugly if we implement forwarding to Python function
bodies for array function implementations.
Needs a runtime test case.
2020-08-09 03:54:42 +01:00
David Nadlinger
faea886c44
compiler: Implement array vs. scalar broadcasting
2020-08-09 03:54:42 +01:00
David Nadlinger
56a872ccc0
compiler: Insert array binop shape check in caller for location information
2020-08-09 03:54:42 +01:00
David Nadlinger
ef260adca8
compiler: Implement matrix multiplication
...
LLVM will take care of optimising the loops. This was still
unnecessarily painful; implementing generics and implementing
this in ARTIQ Python looks very attractive right now.
2020-08-09 03:54:42 +01:00
David Nadlinger
0da4a61d99
compiler: Fix method name typo [nfc]
2020-08-09 03:54:42 +01:00
David Nadlinger
78afa2ea8e
compiler: Support MatMult in inferencer
...
Still needs actual codegen support.
2020-08-09 03:54:42 +01:00
David Nadlinger
4d48470320
compiler: Support common numpy.* math functions
...
Relies on the runtime to provide the necessary
(libm-compatible) functions.
The test is nifty, but a bit brittle; if this breaks in the
future because of optimizer changes, do not hesitate to convert
this into a more pedestrian test case.
2020-08-09 03:54:41 +01:00
David Nadlinger
d37503f21d
compiler: T{C -> External}Function, clarify docs [nfc]
2020-08-09 03:54:41 +01:00
David Nadlinger
da255bee1b
compiler: Implement element type coercion for arrays
...
So far, this is not exposed to the user beyond implicit conversions.
Note that all the implicit conversions, such as triggered by adding
arrays of mismatching types, or dividing integer arrays, are currently
emitted in a maximally inefficient way, where a temporary copy is first
made for the type conversion. The conversions would more sensibly be
implemented during the per-element operations to save on the extra
copies, but the current behaviour fell out of the rest of the IR
generator structure without extra changes.
2020-08-09 03:54:41 +01:00
David Nadlinger
4426e4144f
compiler: Implement unary plus/minus for arrays
...
Implementation is needlessly generic to anticipate
coercion/transcendental functions.
2020-08-09 03:54:41 +01:00
David Nadlinger
0d8fbd4f19
test/lit: Add a test for matrix binary operations
...
No reason to believe other operations won't work the same.
(More exhaustive tests to follow using embedding for comparison
against NumPy.)
2020-08-09 03:54:41 +01:00
David Nadlinger
7bdd6785b7
test/lit: Basic ndarray smoke tests for all binops
2020-08-09 03:54:41 +01:00
David Nadlinger
4d002c7934
compiler: Explain use of rpc_tag() in array ops, formatting [nfc]
2020-08-09 03:54:41 +01:00
David Nadlinger
a7e855b319
compiler.types: Change invalid default value [nfc]
...
This wasn't actually ever used, but was a dict instead of a set.
2020-08-09 03:54:41 +01:00
David Nadlinger
48fb80017f
compiler: Implement basic element-wise array operations
2020-08-09 03:54:41 +01:00
David Nadlinger
9af6e5747d
compiler: Factor rpc_tag() out of llvm_ir_generator
2020-08-09 03:54:41 +01:00
David Nadlinger
e77c7d1c39
compiler: Add inferencer support for array operations
2020-08-09 03:54:41 +01:00
David Nadlinger
ef57cad1a3
compiler: Test ndarray element assignment
2020-08-09 03:54:41 +01:00
David Nadlinger
a9a975e5d4
language: Allow instantating TArray using bare ints
2020-08-09 03:54:41 +01:00
David Nadlinger
504b8f0148
language: Export TArray
2020-08-09 03:54:41 +01:00
David Nadlinger
dea3c0c572
compiler: Don't store redundant ndarray buffer length, match list layout
...
This adds `elt` to _TPointer and the ir.Offset IR instruction,
which is like GetElem but without the final load.
2020-08-09 03:54:41 +01:00
David Nadlinger
e82357d180
compiler: Fix inferencer tests after adding TArray.num_dims
2020-08-09 03:54:41 +01:00
David Nadlinger
cb1cadb46a
compiler: Fix/test 1D array construction from generic iterables
2020-08-09 03:54:41 +01:00
David Nadlinger
38c17622cc
compiler: Axis-wise iteration of ndarrays
...
Matches NumPy. Slicing a TList reallocates, this doesn't; offsetting
couldn't be handled in the IR without introducing new semantics
(the Alloc kludge; could/should be made its own IR type).
2020-08-09 03:54:41 +01:00
David Nadlinger
c95a978ab6
compiler: Iteration for 1D ndarrays
2020-08-09 03:54:41 +01:00
David Nadlinger
bc17bb4d1a
compiler: Parametrize TArray in number of dimensions
2020-08-09 03:54:41 +01:00
David Nadlinger
632c5bc937
compiler: Add ndarray .shape access
2020-08-09 03:54:41 +01:00
David Nadlinger
40f59561f2
compiler: Add test for length of empty arrays [nfc]
...
This makes sure we are actually emitting this as an 1D array
(like NumPy does).
2020-08-09 03:54:41 +01:00
David Nadlinger
d882f8a3f0
compiler: Implement len() for ndarrays
2020-08-09 03:54:41 +01:00
David Nadlinger
575be2aeca
compiler: Basic support for creation of multidimensional arrays
...
Breaks all uses of array(), as indexing is not yet implemented.
2020-08-09 03:54:41 +01:00
David Nadlinger
56010c49fb
compiler/inferencer: Detect rectangular array()s
...
Still needs support through all the rest of the compiler, and
support for higher-dimensional arrays.
Alternatively, we could always assume ndarrays of ndarrays
are rectangular (i.e. ban array/list element types), and
detect mismatch at runtime. This might turn out to be
preferrable to be able to construct matrices from rows/columns.
`array()` is disallowed for no particularly good reason but
numpy API compatibility.
2020-08-09 03:54:41 +01:00
David Nadlinger
6ea836183d
test/lit: Move some list tests to appropriate module [nfc]
2020-08-09 03:54:41 +01:00
pmldrmota
1df62862cd
AD9910: Write correct number of bits to POW register ( #1498 )
...
* coredevice.ad9910: Add return type hints to conversion functions
* coredevice.ad9910: Make set_pow write correct number of bits
The AD9910 expects 16 bits. Thus, if writing 32 bits to the POW register, the chip would likely enter a locked-up state.
* coredevice.ad9910: Correct data alignment in write_16
Co-authored-by: Robert Jördens <rj@quartiq.de>
* coredevice.ad9910: Add function to read from 16 bit registers
Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-08-07 10:10:44 +02:00
504f72a02c
rtio: remove legacy i_overflow_reset CSR
2020-08-06 17:52:32 +08:00
5f36e49f91
test_rtio: make DMA test generic wrt TTL channel
2020-08-06 16:36:14 +08:00
3bfd372c20
compiler: linker discard local symbols.
...
Fixes exception backtrace problem for ARM.
2020-08-06 16:07:28 +08:00
e3c5775584
test: skip CacheTest.test_borrow on Zynq
2020-08-06 10:54:30 +08:00
David Nadlinger
ae999db8f6
compiler: Revert function call lifetime tracking fix
...
This reverts commits f8d1506922
and cf19c9512d
.
While the commit just fixes a clear typo in the implementation,
it turns out the original algorithm isn't flexible enough to
capture functions that transitively return references to
long-lived data. For instance, while cache_get() is special-cased
in the compiler to be recognised as returning a value of Global()
lifetime, a function just forwarding to it (as seen in the
embedding tests) isn't anymore.
A separate issue is also that this makes implementing functions
that take lists and return references to global data in user code
impossible, which central parts of the Oxford codebase rely on.
Just reverting for now to unblock master; a fix is easily designed,
but needs testing.
2020-07-30 16:40:39 +01:00
709026d945
test: relax device_to_host_rate
2020-07-30 17:46:22 +08:00
455e4859b7
simplify versioneer
...
Original version is very complex and still has a number of problems.
2020-07-30 00:54:07 +08:00
5fd0d0bbb6
gui: work around quamash bug with python 3.8
2020-07-28 12:08:47 +08:00
David Nadlinger
f8d1506922
compiler: Fix lifetime tracking for function call return values
...
GitHub: Fixes #1497 .
2020-07-28 00:33:28 +01:00
cw-mlabs
e4b16428f5
wrpll: fix run signal
2020-07-27 13:02:02 +08:00
cw-mlabs
8dd9a6d024
wrpll: fix scl signal
2020-07-27 12:59:32 +08:00
Charles Baynham
9b44ec7bc6
parameters: Allow forcing a NumberValue to return a float
...
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2020-07-27 12:25:51 +08:00
David Nadlinger
1c72585c1b
compiler: Handle None-returning function calls used as values
...
GitHub: Fixes #1493 .
2020-07-25 02:20:53 +01:00
David Nadlinger
57e759a1ed
compiler: Consistently use llunit through llvm_ir_generator [nfc]
2020-07-25 02:20:52 +01:00
2a2f5c4d58
comm_analyzer: make header error flag more general
2020-07-20 19:39:19 +08:00
553a49e194
test_moninj: set loop_out as output
2020-07-19 17:59:43 +08:00
8510bf4e55
test_analyzer: configure loop_out as output
2020-07-16 19:28:58 +08:00
eb28d7be3a
firmware/rpc: fixed typo
2020-07-16 15:15:47 +08:00
f78d673079
firmware/rpc: added #[repr(C)]
for structs.
...
Previously the structs are in repr(Rust) which has no layout guarantee.
2020-07-16 15:11:17 +08:00
e31ee1f0b3
firmware/i2c: rewrite I2C implementation
...
* Never drive SDL or SDA high. They are specified to be open
collector/drain and pulled up by resistive pullups. Driving
high fails miserably in a multi-master topology (e.g. with
a USB I2C interface). It would only ever be implemented to
speed up the bus actively but that's tricky and completely
unnecessary here.
* Make the handover states between the I2C protocol phases (start, stop,
restart, write, read) well defined. Add comments stressing those
pre/postconditions.
* Add checks for SDA arbitration failures and stuck SCL.
* Remove wrong, misleading or redundant comments.
2020-07-15 16:43:07 +08:00
4340a5cfc1
rtio/dma: fix previous commit
2020-07-12 10:14:22 +08:00
f2e0d27334
rtio/dma: remove dead/broken code
2020-07-12 10:13:18 +08:00
901be75ba4
sayma_rtm: fix Si5324 reset
...
Closes #1483
2020-07-11 09:51:01 +08:00
8719bab726
Revert "i2c: duplicate TCA9548 control byte"
...
This reverts commit f265976df6
.
2020-07-08 19:02:02 +08:00
f273a9aacc
artiq_ddb_template: remove SFP LEDs on hw 2.0+
2020-07-08 18:15:36 +08:00
2d1f1fff7f
kasli_generic: do not attempt to use SFP LED for RTIO on 2.0+
2020-07-08 18:14:44 +08:00
85b5a04acf
test: print transfer rates in MiB/s
2020-07-07 17:28:47 +08:00
13501115f6
test: remove watchdog test ( #1458 )
2020-07-07 17:28:47 +08:00
f265976df6
i2c: duplicate TCA9548 control byte
2020-07-03 16:45:05 +08:00
David Nadlinger
3f0cf6e683
runtime: Stop kernel CPU before restarting comms CPU on panic
...
Before, the system would enter a boot loop when a panic occurred
while the kernel CPU was active (and panic_reset == 1), as
kernel::start() for the startup kernel would panic.
2020-07-01 17:29:05 +08:00
95807234d9
compiler: use binutils for ARM
...
This is mostly due to Windoze, where installing anything is a PITA and the LLVM tools won't be available soon.
2020-06-28 17:33:03 +08:00
89c53c35e8
dashboard: style
2020-06-26 10:12:03 +08:00
David Nadlinger
f36692638c
dashboard: Add "Quick Open" dialog for experiments on global shortcut
...
This is similar to functionality in Sublime Text, VS Code, etc.
2020-06-26 10:11:33 +08:00
David Nadlinger
966ed5d013
master/scheduler: Fix priority/due date precedence order when waiting to prepare
...
See test case – previously, the highest-priority pending run would
be used to calculate the timeout, rather than the earliest one.
This probably managed to go undetected for that long as any unrelated
changes to the pipeline (e.g. new submissions, or experiments pausing)
would also cause _get_run() to be re-evaluated.
2020-06-19 23:45:52 +01:00
David Nadlinger
7955b63b00
master: Always write results to HDF5 once run stage is reached
...
Previously, a significant risk of losing experimental results would
be associated with long-running experiments, as any stray exceptions
while run()ing the experiment – for instance, due to infrequent
network glitches or hardware reliability issue – would cause no
HDF5 file to be written. This was especially troublesome as long
experiments would suffer from a higher probability of unanticipated
failures, while at the same time being more costly to re-take in
terms of wall-clock time.
Unanticipated uncaught exceptions like that were enough of an issue
that several Oxford codebases had come up with their own half-baked
mitigation strategies, from swallowing all exceptions in run() by
convention, to always broadcasting all results to uniquely named
datasets such that the partial results could be recovered and written
to HDF5 by manually run recovery experiments.
This commit addresses the problem at its source, changing the worker
behaviour such that an HDF5 file is always written as soon as run()
starts.
2020-06-18 17:47:26 +01:00
David Nadlinger
d87042597a
master/worker_impl: Factor out "completed" message sending [nfc]
...
Just reduces the visual complexity/potential for typos a bit, and
we already have put_exception_report().
2020-06-18 01:30:46 +01:00
charlesbaynham
2429a266f6
ad9912: Fix typing problem on ad9912 ( #1466 )
...
Closes #1463
FTW and phase word were ambiguously typed, resulting in failure to compile
2020-06-16 20:17:22 +02:00
Harry Ho
1a17d0c869
zotino: add USER LED test
2020-06-11 16:03:56 +08:00
Harry Ho
6156bd4088
fastino: add tests using DACs and USER LEDs
2020-06-11 14:55:46 +08:00
a18d2468e9
test: do not build libartiq_support in lit.cfg
2020-06-10 17:15:24 +08:00
9822b88d9b
ad9910: fix asf range ( #1450 )
...
* ad9910: fix asf range
The ASF is a 14-bit word. The highest possible value is 0x3fff, not
0x3ffe. `int(round(1.0 * 0x3fff)) == 0x3fff`.
I don't remember and understand why this was 0x3ffe since the beginning.
0x3fff was already used as a default in `set_mu()`
Signed-off-by: Robert Jördens <rj@quartiq.de>
* RELEASE_NOTES: ad9910 asf scale change
Co-authored-by: David Nadlinger <code@klickverbot.at>
2020-05-29 11:13:26 +02:00
cb76f9da89
metlino: fix CSR collisions
...
Closes #1425
2020-05-29 15:59:44 +08:00
bd9eec15c0
metlino: increase number of DRTIO links
...
Seems OK with Vivado 2019.2.
2020-05-29 15:59:16 +08:00
d5c1eaa16e
runtime: remove stack alignment requirement
...
I suppose this was for TMPU, but was never finished.
2020-05-29 15:37:23 +08:00
02900d79d0
firmware: fix typos
2020-05-29 15:21:07 +08:00
d8b5bcf019
sayma_amc: support uTCA backplane for DRTIO
2020-05-29 14:58:49 +08:00
8b939b7cb3
sayma_amc: remove Master (obsoleted by Metlino)
2020-05-29 14:40:49 +08:00
Charles Baynham
692c466838
Use logger formatting
2020-05-26 17:59:55 +08:00
Charles Baynham
8858ba8095
dashboard: Restart applets if required
...
Restart applets that are already running if a ccb call updates their spec
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2020-05-26 17:59:55 +08:00
2538840756
Coredevice Input Validation ( #1447 )
...
* Input validation and masking of SI -> mu conversions (close #1446 )
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
* Update RELEASE_NOTES
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-05-17 15:09:11 +02:00
b3b6cb8efe
ad53xx improvements ( #1445 )
...
* ad53xx: voltage_to_mu() validation & documentation (closes #1443 , #1444 )
The voltage input (float) is checked for validity. If we need more
speed, we may want to check the DAC-code for over/underflow instead.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
* ad53xx documentation: voltage_to_mu is only valid for 16-bit DACs
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
* AD53xx: add voltage_to_mu method (closes #1341 )
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
* ad53xx: improve voltage_to_mu performance
Interger comparison is faster than floating point math.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
* AD53xx: voltage_to_mu method now uses attribute values
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
* Fixup RELEASE_NOTES.rst
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
* ad53xx: documentation improvements
voltage_to_mu return value
14-bit DAC support
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2020-05-08 19:23:43 +02:00
4e9a529e5a
kasli: integrate WRPLL
2020-05-07 21:34:02 +08:00
60e5f1c18e
kasli: DRTIO support for Kasli 2
2020-05-07 20:09:43 +08:00
1f2182d4c7
kasli: default to hardware v2
2020-05-07 19:15:03 +08:00
35f1814235
kasli: implement virtual LEDs
2020-05-07 19:07:43 +08:00
b83afedf43
kasli: light up ERROR LED on panic
2020-05-07 19:06:10 +08:00
4982fde898
firmware: I2C I/O expander support
2020-05-05 21:38:17 +08:00
ef4e5bc69b
firmware: Kasli I2C EEPROM cleanup
2020-05-05 21:29:29 +08:00
85e92ae28c
compiler: use more LLVM tools on ARM ( #733 )
2020-04-28 16:21:50 +08:00
7e400a78f4
kasli: compile tester for hw 2.0 by default
2020-04-28 16:07:56 +08:00
140a26ad7e
compiler: ld -> ld.lld
2020-04-28 16:07:26 +08:00
4228e0205c
compiler: link with lld on ARM ( #733 )
2020-04-28 15:00:24 +08:00
3a7819704a
rtio: support direct 64-bit now CSR in KernelInitiator
2020-04-26 16:04:32 +08:00
251a0101a6
compiler: support disabling now-pinning
2020-04-26 12:38:43 +08:00
d19f28fa84
kasli: v2 clocking WIP, remove SFP LEDs from RTIO
2020-04-23 23:02:18 +08:00
9bc43b2dbf
kasli: support EEPROM on v2
2020-04-23 23:00:36 +08:00
77e6fdb7a7
artiq_flash: cleanup Sayma RTM management, support flashing AMC with RTM disconnected
2020-04-14 18:22:06 +08:00
ea79ba4622
ttl_serdes: detect edges on short pulses
...
Edges on pulses shorter than the RTIO period were missed because the
reference sample and the last sample of the serdes word are the same.
This change enables detection of edges on pulses as short as the
serdes UI (and shorter as long as the pulse still hits a serdes sample
aperture).
In any RTIO period, only the leading event corresponding to the first
edge with slope according to sensitivity is registerd. If the channel is
sensitive to both rising and falling edges and if the pulse is contained
within an RTIO period, or if it is sensitive only to one edge slope and
there are multiple pulses in an RTIO period, only the leading event is
seen. Thus this possibility of lost events is still there. Only the
conditions under which loss occurs are reduced.
In testing with the kasli-ptb6 variant, this also improves resource
usage (a couple hundred LUT) and timing (0.1 ns WNS).
2020-04-13 13:21:03 +02:00
e8b73876ab
comm_kernel: add Zynq runtime identifier
2020-04-12 17:25:14 +08:00
de57039e6e
comm_kernel: cleanup
2020-04-12 16:02:36 +08:00
9dc24f255e
comm_kernel: remove dead code
2020-04-12 15:06:46 +08:00
fb0ade77a9
firmware: fix non-DRTIO build
2020-04-10 17:23:17 +08:00
ec7b2bea12
sayma: round FTW like Urukul in JDCGSyncDDS
2020-04-08 15:00:33 +08:00
0f4be22274
sayma: add simple sychronized DDS for testing
2020-04-08 14:13:54 +08:00
3c823a483a
sayma: improve DAC sync messaging (again)
2020-04-06 22:36:43 +08:00
4d601c2102
sayma: improve DAC sync messaging
2020-04-06 22:36:03 +08:00
61d4614b61
sayma: fix/cleanup DRTIO-DAC sync interaction
2020-04-06 22:34:05 +08:00
facc0357d8
drtio: make sure receive buffer is drained after ping reply
2020-04-06 22:33:15 +08:00
ffd3172e02
sayma: move SYSREF DDMTD to RTM ( #795 )
2020-04-06 00:01:28 +08:00
8f608fa2fa
examples/sines_urukul_sayma: adapt for sayma v2, use 1 DAC only
2020-04-05 16:51:40 +08:00
Etienne Wodey
90d08988b2
language/environment: BooleanValue: fix type detection
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-04-04 15:37:04 +08:00
Etienne Wodey
9b03a365ed
language/environment: cast argument processor default values early
...
Fixes #1434 . Also add unit tests for some argument processors.
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-04-04 15:37:04 +08:00
4a8d361ace
soc: optimize programmable identifier
2020-03-12 23:09:13 +08:00
9e66dd7075
soc: reprogrammable identifier
2020-03-12 22:23:08 +08:00
380de177e7
rtio: fix wide output after RTIO refactoring
...
fixes 3d0c3cc1cf
2020-03-05 17:55:27 +00:00
e803830b3b
fastino: support wide RTIO interface and channel groups
2020-03-05 17:55:04 +00:00
8451e58fbe
ad9912: fix ftw width docstring
2020-02-27 02:11:12 +08:00
Paweł K
2a909839ff
artiq_flash: added option of specifying another username when connecting through SSH. ( #1429 )
...
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2020-02-19 19:44:11 +08:00
6d26def3ce
sayma: drive filtered_clk_sel on master variant
2020-02-06 22:28:49 +08:00
52ec849008
sayma: fix sysref_delay_dac
2020-02-05 19:04:01 +08:00
c7de1f2e6b
metlino: drive clock muxes
2020-02-05 00:06:34 +08:00
bf9f4e380a
si5324: program I2C mux on Metlino
2020-02-03 18:07:59 +08:00
ffb24e9fff
artiq_flash: use correct proxy bitstream for Metlino
2020-02-03 18:07:26 +08:00
5f8e20b1a1
artiq_sinara_tester: fix device_db filename
2020-01-31 10:26:58 +08:00
dfa033eb87
wrpll: new collector from Weida/Tom
2020-01-24 10:31:52 +08:00
dee16edb78
wrpll: DDMTD sampler double latching
2020-01-22 19:16:26 +08:00
f4d8f77268
turn kasli_tester into a frontend tool
2020-01-21 16:13:04 +08:00
bfcbffcd8d
update smoltcp
...
This disables the 'log' features which does not compile, and may break net_trace. To be investigated later.
2020-01-21 13:58:23 +08:00
82cdb7f933
typo
2020-01-21 10:07:13 +08:00
248230a89e
fastino: style
2020-01-20 13:25:00 +01:00
c45a872cba
fastino: fix init, set_cfg
2020-01-20 13:25:00 +01:00
2c4e5bfee4
fastino: add [WIP]
2020-01-20 13:25:00 +01:00
8f9948a1ff
kasli_sawgmaster: add basemod programming example
2020-01-20 20:14:24 +08:00
e427aaaa66
basemod_att: fix imports
2020-01-20 20:14:24 +08:00
62a52cb086
sayma: do not pollute the log with DAC status on success
2020-01-20 20:14:24 +08:00
6b428ef3be
sayma: initialize DAC before testing jesd::ready
2020-01-20 20:14:24 +08:00
7ab0282234
adf5355: style
2020-01-20 13:13:08 +01:00
9368c26d1c
mirny: add to manual
2020-01-20 13:13:08 +01:00
Etienne Wodey
da531404e8
artiq_ddb_template: add Mirny support
...
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-01-20 13:13:08 +01:00
01a6e77d89
mirny: add
...
* This targets unrelease CPLD gateware (https://github.com/quartiq/mirny/issues/1 )
* includes initial coredevice driver, eem shims, and kasli_generic tooling
* addresses the ARTIQ side of #1130
* Register abstraction to be written
Signed-off-by: Robert Jördens <rj@quartiq.de>
2020-01-20 13:13:08 +01:00
ec03767dcf
sayma: improve DAC status report
2020-01-20 18:22:06 +08:00
5c299de3b4
sayma: print DAC status on JESD not ready error
2020-01-20 18:21:29 +08:00
45efee724e
sayma: add JESD204 PHY done diagnostics
2020-01-20 12:47:31 +08:00
6c3e71a83a
wrpll: cleanup
2020-01-18 09:43:43 +08:00
344f8bd12a
wrpll: collector patch from Weida
2020-01-18 09:42:58 +08:00
833f428391
sayma: fix hmc542 to/from mu
2020-01-16 09:10:32 +08:00
6c948c7726
sayma: RF switch control is active-low on Basemod, invert
2020-01-16 08:59:52 +08:00
50302d57c0
wrpll: more careful I2C timing
2020-01-14 20:03:46 +08:00
105dd60c78
wrpll: ADPLLProgrammer mini test bench and fixes
2020-01-14 16:52:25 +08:00
3242e9ec6c
wrpll: loop test
2020-01-13 22:31:57 +08:00
8ec0f2e717
wrpll: implement ADPLLProgrammer
2020-01-13 22:30:11 +08:00
d5895b8999
wrpll: adpll -> set_adpll
2020-01-13 20:46:36 +08:00
e7ef23d30c
wrpll: use CONFIG_CLOCK_FREQUENCY and rtio_frequency in trim_dcxos
2020-01-13 20:44:15 +08:00
ea3bce6fe3
wrpll: wait for settling time after setting ADPLL
2020-01-13 20:43:34 +08:00
d685619bcd
wrpll: collector code modifications from Weida
2020-01-13 20:42:41 +08:00
9d7196bdb7
update copyright year
2020-01-13 19:33:44 +08:00
e87d864063
wrpll: print ADPLL offsets
2020-01-13 19:32:30 +08:00
8edbc33d0e
wrpll: calculate initial ADPLL offsets
2020-01-13 19:29:10 +08:00
9dd011f4ad
firmware: remove bitrotten Sayma code
2020-01-13 18:47:54 +08:00
583a18dd5f
firmware: expose fmod to kernels. Closes #1417
2020-01-10 14:33:02 +08:00
David Nadlinger
d8c81d6d05
compiler: Other types microoptimisations
...
Interestingly enough, these actually seem to give a measurable
speedup (if small – about 1% improvement out of 6s whole-program
compile-time in one particular test case).
The previous implementation of is_mono() had also interesting
behaviour if `name` wasn't given; it would test only for the
presence of any keys specified via keyword arguments,
disregarding their values. Looking at uses across the current
ARTIQ codebase, I could neither find a case where this would
have actually been triggered, nor any rationale for it.
With the short-circuited implementation from this commit,
is_mono() now checks name/all of params against any specified
conditions.
2020-01-01 08:49:19 +00:00
David Nadlinger
2c34f0214b
compiler: Short-circuit Type.unify() with identical other type
...
This considerably improves performance; ~15% in terms of total
artiq_run-to-kernel-compiled duration in one test case.
2020-01-01 08:49:19 +00:00
eebae01503
artiq_client: add back quiet-verbose args for submission
...
close #1416
regression introduced in 3fd6962
2019-12-31 13:00:26 +01:00
3f32d78c0e
wrpll: simple ADPLL test
2019-12-31 12:12:29 +08:00
bb04b082a7
wrpll: clarify comment
2019-12-31 12:12:29 +08:00
David Nadlinger
1e864b7e2d
coredevice/suservo: Add separate methods for setting only the IIR offset
2019-12-30 20:02:22 +00:00
a666766f38
wrpll: add ADPLL offset registers
2019-12-30 22:19:42 +08:00
5c6e394928
ddmtd: add collector
2019-12-30 22:17:44 +08:00
642a305c6a
wrpll: remove unnecessary delay
...
Counting now happens in the sys domain with no CDC between counter and CPU.
2019-12-30 20:01:06 +08:00
f57f235dca
wrpll: new frequency meter
...
As per Mattermost discussion with Tom.
2019-12-30 19:47:57 +08:00
9e15ff7e6a
wrpll: improve DDMTD deglitcher
2019-12-30 16:56:06 +08:00
dfad27125e
runtime: relax/fix TCP keepalive settings ( #1125 )
2019-12-23 19:58:10 +08:00
b5e1bd3fa2
coredevice: simplify/cleanup network connection code
...
This removes:
* host-side keepalive, which turns out not to be required
* custom connection timeout (the default is OK)
* SSH tunneling support (doesn't seem to be actually used anywhere)
2019-12-23 19:53:49 +08:00
David Nadlinger
af31c6ea21
coredevice: Don't use is
to compare with integer literal
...
This works on CPython, but is not guaranteed to do so, and
produces a warning since 3.8 (see https://bugs.python.org/issue34850 ).
2019-12-22 05:46:41 +00:00
fb2076a026
basemod_att: add dB functions, document
2019-12-21 14:56:41 +08:00
b2480f0edc
artiq_flash: update actions documentation
2019-12-21 14:18:28 +08:00
d4e039cede
basemod: add coredevice driver
2019-12-21 14:18:10 +08:00
106d25b32a
kasli_sawgmaster: fix drtio_is_up
2019-12-21 14:17:52 +08:00
8759c8d360
shiftreg: fix get method
2019-12-21 14:17:22 +08:00
c3030f4ffb
kasli_sawgmaster: update device_db for BaseMod
2019-12-20 19:59:15 +08:00
cab8c8249e
coredevice/shiftreg: add get method
2019-12-20 18:58:50 +08:00
b7f1623197
sayma_rtm: connect attenuator shift registers in series
2019-12-20 18:58:31 +08:00
c5137eeb62
firmware: remove legacy hmc542 code
2019-12-20 15:25:55 +08:00
1c9cbe6285
sayma_rtm: add basemod attenuators on RTIO
2019-12-20 15:25:55 +08:00
David Nadlinger
8f518c6b05
compiler: Allow None
in type hints
...
Similar to how Python itself interprets None as type(None),
make it translate to TNone in ARTIQ compiler type hints.
2019-12-19 09:36:45 +08:00
David Nadlinger
594ff45750
compiler: Revert support for None
as TNone
...
This was mistakenly included in fb2b634c4a
, and broke the test
case verifying that using None as an ARTIQ type annotation in fact
generates an error message.
2019-12-18 13:23:40 +00:00
David Nadlinger
fb2b634c4a
compiler, language: Implement @kernel_from_string
...
With support for polymorphism (or type erasure on pointers to
member functions) being absent in the ARTIQ compiler, code
generation is vital to be able to implement abstractions that
work with user-provided lists/trees of objects with uniform
interfaces (e.g. a common base class, or duck typing), but
different concrete types.
@kernel_from_string has been in production use for exactly
this use case in Oxford for the better part of a year now
(various places in ndscan).
GitHub: Fixes #1089 .
2019-12-18 10:51:04 +08:00
6ee15fbcae
sayma_rtm: basemod RF switches
2019-12-18 10:33:29 +08:00
David Nadlinger
d3508b014f
firmware: Add whitespace between panic handler location and message
2019-12-17 19:59:59 +00:00
David Nadlinger
0279a60a55
examples: Add README
...
This will be displayed by GitHub below the directory listing, and was
inspired by observing new users disregard the examples/ tree entirely
(even though the experiments and device DBs within would have cleared
up their getting-started confusion) due to the perceived complexity
wall induced by the wealth of subdirectories.
2019-12-17 13:35:19 +00:00
8d13aeb96c
test: run test_help for browser and dashboard
2019-12-12 10:34:58 +08:00
ac09f3a5da
artiq_browser: fix command line argument handling. Closes #1404
2019-12-11 16:18:56 +08:00
52112d54f9
kasli_generic: expose peripheral_processors dictionary. Closes #1403
2019-12-10 10:30:06 +08:00
6f52540569
wrpll: fix previous commit
2019-12-09 20:13:55 +08:00
13486f3acf
wrpll: swap helper/main si549 frequencies
2019-12-09 19:49:34 +08:00
150a02117c
sayma_rtm: drive clk_src_ext_sel
2019-12-09 19:47:50 +08:00
307a6ca140
gth_ultrascale: make OBUFDS_GTE3 work
...
https://www.xilinx.com/support/answers/67919.html
2019-12-09 18:13:22 +08:00
4919fb8765
wrpll: print DDMTD helper tags
2019-12-09 17:39:22 +08:00
0d4eccc1a5
wrpll: improve debug output
2019-12-09 17:23:09 +08:00
f633c62e8d
wrpll: speed up si549 i2c access
2019-12-09 17:22:58 +08:00
14e09582b6
wrpll: work around si549 not working when lsdiv=2
2019-12-09 16:20:08 +08:00
439576f59d
wrpll: fix Si549 initialization delays
2019-12-09 16:13:57 +08:00
2b5213b013
wrpll: constrain clocks
2019-12-09 12:26:44 +08:00
05e2e1899a
wrpll: update OBUFDS_GTE2 comment
...
Seems O can fan out simultaneously to transceiver and fabric.
Kasli is using ODIV2 for no particular reason.
2019-12-09 11:58:54 +08:00
4148efd2ee
wrpll: implement filters and connect to Si549
2019-12-09 11:47:29 +08:00
d43fe644f0
wrpll: stabilize DDMTDSamplerGTP
2019-12-09 11:47:14 +08:00
0499f83580
wrpll: helper clock sanity check
2019-12-08 23:46:33 +08:00
46a776d06e
sayma: introduce WRPLL on RTM
2019-12-08 15:30:00 +08:00
f35f658bc5
artiq_flash: rework RTM management
2019-12-08 15:29:31 +08:00
bcd061f141
artiq_flash: RTM is a regular DRTIO satellite, can be used with all variants
2019-12-08 15:12:04 +08:00
883310d83e
sayma_rtm: si5324 -> cdrclkc
2019-12-08 14:26:05 +08:00
57a5bea43a
sayma_rtm: support setting RTIO frequency
2019-12-08 11:45:31 +08:00
da9237de53
wrpll: support differential DDMTD inputs
2019-12-07 18:18:57 +08:00
Paweł Kulik
3851a02a3a
Added option of flashing only RTM gateware.
...
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:31:19 +08:00
Paweł Kulik
14e250c78f
Enabled internal pullup for CML SYSREF outputs, otherwise there is no signal on them.
...
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:30:24 +08:00
7098854b0f
wrpll: share DDMTD counter
2019-12-04 19:05:56 +08:00
05c5fed07d
suservo: stray comma
2019-12-03 08:38:07 +00:00
56074cfffa
suservo: support operating with one urukul
...
implemented by wiring up the second Urukul to dummy pins
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
86e1924493
kasli_generic: support external reference on masters
2019-11-30 07:34:41 +00:00
eb271f383b
wrpll: add DDMTD cores
2019-11-28 22:03:50 +08:00
39d5ca11f4
si549: increase I2C frequency
2019-11-28 22:03:26 +08:00
87894102e5
si549: use recommended i2c read sequence
2019-11-28 17:49:02 +08:00
2e55e39ac7
wrpll: use spaces to indent
2019-11-28 17:40:25 +08:00
354d82cfe3
wrpll: drive helper clock domain
2019-11-28 17:40:00 +08:00
4a03ca928d
artiq_flash: sayma fixes
2019-11-28 17:38:29 +08:00
68cab5be8c
si549: cleanups
2019-11-28 16:36:59 +08:00
bcd2383c9d
wrpll: si549 initialization
2019-11-27 22:58:08 +08:00
4832bfb08c
wrpll: i2c functions, select_recovered_clock placeholder
2019-11-27 21:21:00 +08:00
449d2c4f08
libboard_misoc: fix !has_i2c
2019-11-27 21:04:28 +08:00
e0687b77f5
si5324: 10 MHz ext_ref_frequency
...
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-11-22 18:29:12 +01:00
c536f6c4df
sayma_amc: output ddmtd_rec_clk
2019-11-20 19:16:04 +08:00
ae50da09c4
drtio/gth_ultrascale: support OBUFDS_GTE3
2019-11-20 19:15:50 +08:00
fe0c324b38
sayma: integrate si549 core
2019-11-20 17:37:16 +08:00
fa41c946ea
wrpll: si549 fixes
2019-11-20 17:04:24 +08:00
c5dbab1929
gateware: move wrpll to drtio
2019-11-20 14:43:08 +08:00
gthickman
56d4b70e01
ad9910 osk ( #1387 )
...
* updated adoo10.py for RAM mode frequency control
* updated docstrings for set_cfr1() in ad9910.py
* fixed typo in ad9910.py
* added docstrings to ad9910.py
* removed OSK-related changes in AD9910, to be included in a separate branch.
* updated AD9910 set_cfr1 for control of OSK mode parameters
* updated AD9910 set_cfr1() for control of OSK mode parameters.
2019-11-18 15:57:26 +01:00
Fabian Schmid
f73e2a3d30
doc: clarify urukul attenuator behavior
...
Closes #1386
Signed-off-by: Fabian Schmid <fabian.schmid@mpq.mpg.de>
2019-11-18 15:56:00 +01:00
3adc799785
update GUI background
2019-11-15 13:49:09 +08:00
db13747279
fix device_db alias corner case bugs. Closes #1140
2019-11-14 16:22:45 +08:00
4707aef45c
split out artiq-comtools
2019-11-14 15:21:51 +08:00
4416378d21
frontend: add --version to common tools
2019-11-14 11:42:31 +08:00
Garrett
f8a7e278b8
removed OSK-related changes in AD9910, to be included in a separate branch.
2019-11-12 19:07:05 +01:00
Garrett
3a19ba7e62
added docstrings to ad9910.py
2019-11-12 19:07:05 +01:00
Garrett
4ad3651022
fixed typo in ad9910.py
2019-11-12 19:07:05 +01:00
Garrett
6d34eb3bb0
updated docstrings for set_cfr1() in ad9910.py
2019-11-12 19:07:05 +01:00
Garrett
61ca46ec3f
updated adoo10.py for RAM mode frequency control
2019-11-12 19:07:05 +01:00
fd7081830c
remove fire_and_forget (moved to sipyco)
2019-11-12 19:43:04 +08:00
3fd6962bd2
use sipyco ( #585 )
2019-11-10 15:55:17 +08:00
6644903843
bootloader: fix imports
2019-11-06 14:45:55 +08:00
5279bc275a
urukul: rework EEPROM synchronization. Closes #1372
2019-11-05 18:56:10 +08:00
David Nadlinger
bc3b55b1a8
gateware/eem: Force IOB=TRUE on Urukul SYNC output
...
Without this, the final register in the SYNC signal TTLClockGen
isn't (always) placed in the I/O tile, leading to more jitter
than necessary, and causing "double window" artefacts. See
sinara-hw/Urukul#16 for more details.
(Patch based on work by Weida Zhang, testing by various members
of the community in Oxford and elsewhere.)
2019-11-05 17:14:07 +08:00
b25a17fa37
netboot: support slave FPGA loading
2019-11-05 16:28:49 +08:00
307f39e900
remoting: fix multiuser access. Closes #1383
2019-11-05 15:46:07 +08:00
9dc82bd766
bootloader: add no_flash_boot config option to force network boot
2019-11-05 15:31:08 +08:00
e2f9f59472
artiq_flash: fix flashing Sayma RTM from package
2019-11-05 15:19:01 +08:00
98854473dd
sayma_amc: use all transceivers on master ( #1230 )
2019-11-02 12:12:32 +08:00
29b4d87943
firmware: add cargosha256.nix
2019-11-01 10:28:41 +08:00
5362f92b39
bootloader: disable minimum stack space check in linker script
...
* The value varies greatly whether netboot is enabled or not.
* There is no simple solution to detect has_ethmac in the linker script and set the value accordingly.
* The space check is an imperfect solution that will be superseded by stack pointer limits.
* Left commented out so we can re-enable it manually during development if stack corruption is suspected.
2019-11-01 10:25:14 +08:00
deadfead2a
bootloader: fix !has_ethmac
2019-11-01 10:19:08 +08:00
42af76326f
kasli: enlarge integrated CPU SRAM for DRTIO masters
...
Required by the bootloader netboot support.
2019-11-01 10:15:13 +08:00
a78e493b72
firmware: load slave FPGA in bootloader
2019-10-31 12:42:40 +08:00
389a8f587a
slave_fpga: modularize
2019-10-31 11:50:53 +08:00
9a35a2ed81
test_frontends: update
2019-10-30 22:02:16 +08:00
bc050fdeec
bootloader: treat zero-length firmware in flash as no firmware
2019-10-30 21:46:06 +08:00
228e44a059
sayma: enable Ethernet on DRTIO satellite variant
...
So that netboot can be used in bootloader.
2019-10-30 21:39:00 +08:00
dc71039934
sayma, metlino: increase integrated_sram_size on Ethernet-enabled variants
2019-10-30 21:36:00 +08:00
3042476230
artiq_netboot: remove unnecessary import
2019-10-30 21:29:33 +08:00
c96de7454d
remove artiq_devtool
2019-10-30 21:27:24 +08:00
88dbff46f4
add netboot tool
2019-10-30 21:24:51 +08:00
462cf5967e
bootloader: add netboot support
2019-10-30 21:23:42 +08:00
1f15e55021
comm_analyzer: don't assume every message has data
...
close #1377
2019-10-28 15:35:44 +01:00
David Nadlinger
611bcc4db4
compiler: Cache expensive target data layout queries
...
On one typical experiment, this shaves about 3 seconds (~25%)
off the overall kernel compilation time.
GitHub: Closes #1370 .
2019-10-28 11:09:25 +00:00
David Nadlinger
5d7f22ffa4
compiler: Remove provision for unused four-parameter llptr_to_var() form [nfc]
...
`var_type` was presumably intended to convert to a target type,
but wasn't actually acted on in the function body (nor was it
used anywhere in the codebase).
2019-10-28 11:02:46 +00:00
f2f7170d20
hmc7043: use recommend I/O standards
...
https://github.com/sinara-hw/Sayma_RTM/issues/116#issuecomment-544187952
2019-10-21 22:56:10 +08:00
47a83c71f1
firmware: more readable network addresses message
2019-10-21 14:00:14 +08:00
818d6b2f5a
bootloader: fix compilation problems
2019-10-21 13:28:17 +08:00
8f76a3218e
firmware: move i2c to libboard_misoc, enable IPv6 in bootloader, share network settings
2019-10-21 12:58:52 +08:00
1c5e749036
satman: remove compilation warning without JESD DACs
2019-10-21 12:53:54 +08:00
d26d80410e
runtime: refactor network settings
2019-10-19 17:56:35 +08:00
6d5dcb4211
runtime: enable IPv6. Closes #349
2019-10-19 17:20:33 +08:00
05e8f24c24
sayma2: JESD204 synchronization
2019-10-18 23:28:47 +08:00
62b49882b9
examples/kc705: fix dds_test
2019-10-17 07:37:00 +08:00
a8f85860c4
coreanalyzer: AD9914 fixes ( #1376 )
2019-10-17 07:29:33 +08:00
d42ff81144
examples/sayma_master: update device_db
2019-10-16 18:49:25 +08:00
8fa3c6460e
sayma_amc: set direction of external TTL buffer according to RTIO PHY OE
2019-10-16 18:48:50 +08:00
37d0a5dc19
rtio/ttl: expose OE
2019-10-16 18:48:20 +08:00
bc060b7f01
style
2019-10-16 18:18:11 +08:00
40d64fc782
sayma: remove standalone examples (no longer supported)
2019-10-16 17:54:39 +08:00
21a1c6de3f
sayma: use SFP0 for DRTIO master
2019-10-16 17:53:40 +08:00
6cf06fba7b
examples: use default IP addresses for boards
2019-10-16 16:18:30 +08:00
314d9b5d06
kasli: default to 125MHz frequency for DRTIO
...
This is the consistent and most common option. Sayma will also eventually move to it.
2019-10-08 12:59:52 +08:00
4df2c5d1fb
sayma: prepare for SYSREF align
...
We will try DDMTD on the AMC first, as this is simpler and perhaps will work on v2 after the power supply fixes.
2019-10-08 12:30:47 +08:00
5ee81dc643
satman: define constants for JdacBasicRequest reqnos
2019-10-08 10:27:04 +08:00
4b3baf4825
firmware: run PRBS and STPL JESD204 tests
2019-10-08 00:10:36 +08:00
03007b896e
sayma_amc: sma -> mcx
2019-10-07 20:31:35 +08:00
ebd5d890f1
satman: check for JESD ready
2019-10-06 23:10:57 +08:00
90e3b83e80
hmc7043: turn on AMC_FPGA_SYSREF1
...
Florent's JESD core won't work at all without.
2019-10-06 22:49:00 +08:00
97a0dee3e8
jesd204: remove ibuf_disable
...
We use the MOSFET to mute the HMC7043 noise on hardware v2 instead.
2019-10-06 22:26:31 +08:00
1bc7743e03
sayma: fix hmc7043 output settings for v2 hardware
2019-10-06 21:50:29 +08:00
a421820a32
sayma: initialize DACs over DRTIO
2019-10-06 21:42:45 +08:00
f8e4cc37d0
sayma_rtm: reset and detect DACs
2019-10-06 20:15:27 +08:00
f62dc7e1d4
sayma: refactor JESD DAC channel groups
2019-10-06 20:15:09 +08:00
c4c884b8ce
ad9154: simplify, focus on AD9154 config and do not include JESD
2019-10-06 20:07:02 +08:00
fdba0bfbbc
satman: move now-unrelated hmc830_7043 init away from DRTIO transceiver init
2019-10-06 19:22:46 +08:00
1c6c22fde9
sayma_amc: HMC830_REF moved to RTM side
2019-10-06 18:15:37 +08:00
ad63908aff
hmc830_7043: enable_fpga_ibuf -> unmute
2019-10-06 18:13:59 +08:00
5ad65b9d30
hmc830_7043: remove clock_mux
2019-10-06 18:13:27 +08:00
e6ff44301b
sayma_amc: cleanup (v2.0 only)
2019-10-06 18:11:43 +08:00
e9b81f6e33
remove serwb
...
DRTIO is a better solution
2019-10-06 18:10:23 +08:00
7cd02d30b7
sayma_rtm_drtio: replace sayma_rtm
2019-10-06 17:59:53 +08:00
b3b85135a3
sayma_rtm_drtio: add DDMTD core, move specific cores out of SatelliteBase
2019-10-06 17:59:11 +08:00
346c985347
sayma_rtm_drtio: use artiq_sayma folder
2019-10-06 17:30:08 +08:00
e2a924449d
artiq_flash: use DRTIO RTM gateware
2019-10-06 17:28:14 +08:00
4198033657
sayma_rtm_drtio: cleanup (v2.0 only)
2019-10-06 16:42:34 +08:00
5612b31860
sayma_rtm_drtio: add HMC clock chip and DAC control
2019-10-06 16:15:24 +08:00
a8cf4c2b18
sayma_rtm: hwrev v2.0 by default
2019-10-06 13:25:30 +08:00
1bc5d44a7c
artiq_flash: do not flash RTM gateware on Sayma variants that don't need it
2019-10-06 13:15:50 +08:00
bb5ff46f7d
Merge branch 'wrpll'
2019-10-05 10:24:11 +08:00
7b95814cf5
sayma_amc: refactor, add SimpleSatellite variant
2019-10-05 10:24:06 +08:00
58b7bdcecc
sayma_amc: refactor RTM FPGA code
2019-10-05 10:24:06 +08:00
96fc4a21e8
sayma_amc: remove dummy FPGA pin assignment testing code
2019-10-05 10:24:06 +08:00
Tim Ballance
ada3b39f4e
Fix ad9910 ram mode asf scale error in polar mode
2019-10-04 20:14:41 +02:00
Tim Ballance
448080e71d
Fix ad9910 ram mode asf scale error
...
RAM mode amplitude to ASF conversion should be << 18 rather than << 16
2019-10-04 20:14:41 +02:00
6aa68e1715
sayma_rtm2: select filtered clock from Si5324
2019-10-04 22:56:16 +08:00
6cb0f5de59
sayma_amc: enable DRTIO switching
2019-10-04 22:55:23 +08:00
0cf8a46bbd
sayma_amc2: select filtered clock from Si5324
2019-10-04 21:28:26 +08:00
6f533727cb
artiq_flash: use regular bscan_spi_xcku040 for Sayma
...
The modified version is no longer necessary on v2 boards, and breaks flash bank 1.
2019-10-04 17:50:45 +08:00
4c1fe1de0d
environment: implement HasEnvironment.call_child_method ( #1366 )
2019-09-30 23:58:36 +08:00
Charles Baynham
0b1fb255a9
tools: Wrap Task _do() calls in a generic exception handler
...
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-20 23:00:59 +08:00
Charles Baynham
e50a6d5aaf
worker_impy: ignore newline at start of experiment docstring
2019-09-20 22:10:49 +08:00
f0e87d2e59
grabber: remove unused code
2019-09-20 15:26:12 +02:00
4e77be0511
firmware: add Cargo.lock header that newer cargo wants
2019-09-17 15:22:14 +08:00
Charles Baynham
b7abf2fb53
pyon: Handle inf in decoding
2019-09-12 09:46:05 +08:00
38fca01189
artiq_ddb_template: add su-servo support ( #1343 )
2019-09-11 15:52:25 +08:00
991c686d72
kasli_generic,eem: print RTIO channels in hex like artiq_ddb_template
2019-09-11 15:51:53 +08:00
f4dd7e5e29
kasli_tester: init urukul channel before calibrating
...
Otherwise the DDS is not initialized and with a cold system it fails to
find IO_UPDATE edges.
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-09-11 07:16:35 +00:00
7492a59f6d
kasli_generic: add SUServo support ( #1343 )
2019-09-11 11:12:48 +08:00
David Nadlinger
6d6f66338b
runtime: Update core config panic_reset command suggestion message
2019-09-10 19:31:19 +01:00
Charles Baynham
ddd34e5a9c
influx_schedule: log repo_rev along with other info
...
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-10 13:46:28 +02:00
98caaebade
consistent use of 'class name' terminology to select a class within an experiment file. Closes #1348
2019-09-09 15:16:33 +08:00
21021beb08
kasli: remove opticlock (moved to kasli_generic)
2019-09-09 15:03:10 +08:00
436662be52
ddb_template: add Novogorny support
2019-09-09 15:00:45 +08:00
69c2acd9d7
ddb_template: sampler cnv is ttl not spi
2019-09-09 14:57:42 +08:00
cfb5ef5548
kasli_generic: add Novogorny support
2019-09-09 14:54:34 +08:00
0b9168994f
Revert "dashboard: Sort TTL moninj channels by name"
...
This reverts commit b3db3ea6fc
.
Closes #1288
2019-09-06 11:17:10 +08:00
Charles Baynham
d31f30a436
influxdb_schedule: fix typo in parameter name
2019-09-05 17:42:56 +02:00
Charles Baynham
7ac8feea19
influxdb_schedule: Handle all exceptions
2019-09-05 17:42:56 +02:00
1fb317778a
eem/grabber: allow third EEM to be specified
2019-08-29 18:58:12 +08:00
90e8e074cd
firmware: turn errors into &str for remote_i2c as well
...
should resolve breakage on a few targets/variants introduced by PR #1351
2019-08-29 09:05:47 +08:00
71b3c66af9
firmware: conditionally compile has_si5324
...
avoids unused warnings where this module is not used.
2019-08-29 09:04:54 +08:00
959679d8b7
wrpll: add I2CMasterMachine
2019-08-27 18:02:05 +08:00
c03c35f375
Revert "compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf"
...
rustc insists on -unknown.
This reverts commit cf47fa44d8
.
2019-08-26 11:23:00 +08:00
cf47fa44d8
compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf
2019-08-26 11:12:49 +08:00
98cd9a539c
compiler: support Cortex A9 target
2019-08-26 10:46:22 +08:00
afe162ceca
firmware: don't unwrap() but propagate pca9548 errors
2019-08-17 09:15:26 +08:00
a8aabd3815
firwmare: turn i2c errors into &str
2019-08-17 09:15:26 +08:00
8fc5ce902f
firmware: let kasli obtain default hardware_addr from i2c_eeprom
2019-08-17 09:15:26 +08:00
d666f3d573
firmware: factor out mod pca9548 from si5324
...
orepares for further i2c devices.
2019-08-17 09:15:26 +08:00
1fd2322662
wrpll/thls: implement global writeback
2019-08-15 23:16:17 +08:00
24082b687e
wrpll/filters: clean up and make compatible with thls
2019-08-15 17:58:22 +08:00
9331fafab0
wrpll/filters: new code from Weida
2019-08-15 17:24:40 +08:00
5c3974c265
wrpll/thls: fix opcode decoding
2019-08-15 17:12:48 +08:00
19620948bf
wrpll/thls: implement signed numbers
2019-08-15 17:04:17 +08:00
efc43142a6
wrpll/thls: implement min/max
2019-08-15 16:42:59 +08:00
44969b03ad
wrpll/thls: rework instruction decoding
2019-08-15 15:55:13 +08:00
2776c5b16b
wrpll/thls: support mulshift
2019-08-15 15:07:13 +08:00
e9b78b62db
kasli_tester/zotino: always alternate voltage sign
...
Before the voltages on a second Zotino would start 2.1, 1.9, 2.2, 1.8
..., 3.6, 0.4 and overlap with the voltages on the first.
Now the voltages are 2.1, -2.1, 2.2, -2.2, ..., 3.6, -3.6 which allows
quick identification of card/channel and easy prediction when deploying.
2019-08-06 17:38:55 +02:00
f861459ace
wrpll: add filter algorithms (WIP)
2019-08-02 13:23:16 +08:00
David Nadlinger
99e490f9ff
coredevice/suservo: Slightly reword get_adc[_mu]() docstring for clarity
...
This hopefully suggests a bit better that the value is the last one
fetched by the servo (i.e. needs the servo active to update), rather
than somehow requesting a new sample to be taken.
2019-07-30 12:22:08 +01:00
3f0657f2a8
artiq_influxdb_schedule: add schedule logger
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-07-26 14:47:18 +02:00
7a5dcbe60e
wrpll/thls: support processor start/stop
2019-07-24 18:51:33 +08:00
b8870997d0
doc: clarify TTL direction control with buffered cards
2019-07-24 10:04:45 +08:00
623446f82c
wrpll/thls: simple simulation demo
2019-07-20 18:50:57 +08:00
831b3514d3
wrpll/thls: stop at return statement
2019-07-19 16:27:29 +08:00
David Nadlinger
280915d54f
coredevice/suservo: Adjust T_CYCLE to match gateware
...
See GitHub #1338 .
2019-07-17 00:20:22 +01:00
34222b3f38
wrpll: encode thls program
2019-07-09 17:56:14 +08:00
5f461d08cd
wrpll: add simple thls compiler
2019-07-09 16:07:31 +08:00
f7e10759dc
suservo: note requirement to stop servo when accessing state
...
As already mentioned in the gateware.
One alternative would be to detect address collisions and
stall the read for one cycle.
Note that there will in general not be a consistent view of the servo
state unless the servo is stopped.
close #1337
2019-07-08 18:37:42 +02:00
e4fff390a8
si590 -> si549
...
Had mistaken the part numbers.
2019-07-07 09:39:55 +08:00
dceb5ae501
wrpll: Si590 I2C mux, CDC
2019-07-05 23:42:37 +08:00
f8dba7ae35
rtio: use BlindTransfer from Migen
2019-07-05 18:46:18 +08:00
5a9bb0ecba
runtime: fix incorrect 'RTIO clock failed' report
2019-06-24 23:33:13 +08:00
David Nadlinger
8bf9640185
coredevice/suservo: Fix output IIR state width in docstring
2019-06-21 11:27:39 +02:00
David Nadlinger
34f48f57cc
coredevice/suservo: Fix {get,set}_y_mu() scaling
...
Previously, Channel.set_y(1) would set the output to -1 instead.
2019-06-21 11:27:39 +02:00
f6edceb23d
kasli_tester: cleanup/fix test skipping
2019-06-21 16:00:14 +08:00
whitequark
b8b9fa51bd
libdyld: accept objects with no rela relocations.
2019-06-17 06:43:34 +00:00
David Nadlinger
0353966ef7
gateware/suservo: Sign-extend data on RTIO read-back
...
See GitHub #1327 for original patch by Brad Bondurant.
2019-06-14 23:46:16 +01:00
David Nadlinger
720838a23e
gateware/suservo: Avoid magic number for activation delay width
...
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
2019-06-14 23:45:40 +01:00
53789ba9aa
tester: handle urukul switch differences
2019-06-14 10:54:00 +00:00
6655e567df
ddb_template: urukul fixes
...
* fix/add sw (ad9912 and ad9910)
* allow pll_n to be changed
2019-06-14 10:53:03 +00:00
53c778ae2d
runtime: fix previous commit
2019-06-14 15:53:01 +08:00
a947867887
runtime: support Kasli Si5324 bypass via rtio_clock=e
2019-06-14 15:48:05 +08:00
66a66b03b4
style
2019-06-14 15:29:16 +08:00
87ce24e867
runtime: refactor startup and RTIO clocking initialization
2019-06-14 15:26:30 +08:00
43e58c939c
sayma: drop MasterDAC
...
This seemed like a good idea then, but it introduces complexity, corner cases, and additional testing difficulties.
Now Sayma works fine with Kasli as a master, which is simpler.
2019-06-14 14:06:16 +08:00
b04e15741b
drop SI5324_SAYMA_REF
2019-06-14 14:03:48 +08:00
636b4cae5a
tester: urukul single-eem mode
2019-06-13 12:48:42 +00:00
591de0e579
ddb_template: support urukul single-eem mode
2019-06-13 12:19:12 +00:00
967d192cbe
ddb_template: wrong copy paste comma
2019-06-13 11:30:22 +00:00
8853cf8df9
dashboard: work around disappearing TTL/DDS panel bug. Closes #1307
2019-06-13 18:41:42 +08:00
1a898c423a
aqctl_corelog: filter log messages. Closes #1316
2019-06-13 18:17:52 +08:00
834d03527b
examples/dds_setter: fix RTIO underflow
2019-06-13 18:07:39 +08:00
e3c58d5872
remove outdated kc705 examples
2019-06-13 18:06:26 +08:00
74e4b01201
urukul: document consequences of incorrect CPLD clock settings
2019-06-11 11:12:12 +08:00
adf3df2bb5
suservo coredevice driver: mask ftw to avoid erroneous sign extension
2019-06-03 21:40:04 +02:00
bc2cfd77f5
metlino: add EEMs
2019-05-19 18:16:00 +08:00
cdef50c0dd
sayma_amc: Urukul v1.3
2019-05-19 16:54:38 +08:00
34c61db790
artiq_flash: fix Metlino support
2019-05-19 16:37:40 +08:00
88b6496c8c
artiq_flash: add Metlino support
2019-05-19 16:30:10 +08:00
9dcaae6395
metlino: use variant output directory
2019-05-19 16:24:51 +08:00
b4779969d0
metlino: work around vivado bug ( #1230 )
2019-05-19 11:27:27 +08:00
874542f33f
add Metlino support
2019-05-19 10:57:43 +08:00
hartytp
cfe1f56f73
suservo: add some more comments to the RTServoMem to clarify the RTIO interface ( #1323 )
2019-05-17 16:12:35 +01:00
David Nadlinger
84b91ee8bd
master/scheduler: Document Deleter semantics [nfc]
...
From looking at the code, it wasn't obvious to me that this is
supposed to handle multiple calls to delete(). This is the case,
however, when for instance Scheduler.delete()ing a run, which
will then also be deleted again from AnalyzeStage.
2019-05-14 22:37:16 +01:00
hartytp
c2b4f0cfe3
sync_struct: catch ConnectionErrors in _receive_cr ( #1319 )
2019-05-10 12:53:51 +01:00
hartytp
bbcd1db025
sync_struct: replace ConnectionError subclasses with ConnectionError ( #1318 )
2019-05-10 12:48:12 +01:00
hartytp
30fe624fe5
sync_struct: flake8 [nfc] ( #1317 )
2019-05-10 12:42:06 +01:00