mwojcik
1cc7398bc0
drtio: add sat -> mst async notif packet
2024-01-09 08:44:45 +08:00
mwojcik
9f4b8db2de
repeater: fix setting tsc
2023-12-01 16:43:48 +08:00
Sebastien Bourdeauducq
e81e8f28cf
gateware: merge kasli_generic into kasli. Closes #2279
2023-11-14 14:01:17 +08:00
Simon Renblad
e7af219505
kasli_generic: add support for user LEDs
...
Add additional LED RTIO devices.
2023-11-08 10:51:39 +08:00
linuswck
ec2b86b08d
kc705: fix gtx clock path durnig init
2023-11-07 18:36:48 +08:00
linuswck
8f7d138dbd
gtx: Always enable IBUFDS_GTE2, add clk_path_ready
...
- Set clk_path_ready to High to start Initialization of GTP TX and RX
2023-11-07 18:36:48 +08:00
linuswck
bb0b8a6c00
kasli: Correct the GTP TX clock path during init
...
- TXOUT must be fed back into TXUSRCLK during initialization
- Now, MMCM Clock Input is switched before GTP TX Init is started instead of after GTP TX Init is done
- Reset in Sys Clock domain is kept asserted when clock is switched and GTP TX Init is NOT done
2023-11-07 13:40:32 +08:00
linuswck
de41bd6655
eem_7series: pass through kwargs for shuttler
2023-10-11 12:15:06 +08:00
occheung
43926574da
shuttler: remove sdm constants
2023-10-05 07:40:00 +08:00
occheung
0e8fa8933f
shuttler: init sigma-delta modulator
2023-09-30 11:51:43 +08:00
occheung
a772dee1cc
shuttler: change 0th order accumulator width
...
It now truncates the LSBs instead of the MSBs.
2023-09-29 10:09:39 +08:00
linuswck
ab0d4c41c3
Shuttler: pdq, efc->shuttler pdq_words->coef_words
2023-09-27 17:29:16 +08:00
occheung
b52f253dbd
Simplify OOB reset by clock division ( #2217 )
...
* oob: simply logic by dividing into clk100
* replace clk100 clk ctrl with clk200 async reset
* fix comment (singular/plural)
* oob reset: invoke platform commands locally
* cleanup
* oob reset: add async reset import
* fix duplicated comment
2023-09-26 08:02:49 +08:00
occheung
a2fbcb8bfd
pre-dac gain/offsets: detect overflow & underflow
...
And output maximum / minimum DAC code when over/underflow
2023-09-19 18:49:20 +08:00
occheung
1bb7e9ceef
shuttler: support pre-DAC gain & offset
2023-09-19 18:49:20 +08:00
David Nadlinger
9e5b62a6b1
gateware/targets/kasli: Only set DRTIO_ROLE in *Base classes [nfc]
...
kasli_generic uses the drtio_role setting to select the particular
*Generic class to use anyway.
2023-09-17 10:24:51 +08:00
David Nadlinger
22ab62324c
gateware/targets/kasli: Set DRTIO_ROLE in {Master, Satellite}Base
...
These were introduced in 82bd913f63
, and for Kasli only set from
the JSON description in the *Generic subclasses. Not all firmware
is built through that API, however, e.g. the CI system at the
University of Oxford. The missing attribute breaks artiq.build_soc.
2023-09-17 00:48:42 +01:00
linuswck
7c8073c1ce
Shuttler: Add DAC Data Interface Gateware
...
- Add Parallel DDR Data Interface for DAC
- Add MMCM to generate phase shifted DDR Clk(45 degree phase shift by default)
- Connect dac_interface to Shuttler Module
2023-09-11 11:37:13 +08:00
occheung
7f63bb322d
disable DRTIO-over-EEM OSERDES until clock is stable
...
This asserts OOB reset on EFC.
2023-09-05 16:59:01 +08:00
occheung
5e5d671f4c
kasli: add invoke order comments
2023-09-04 12:05:45 +08:00
occheung
98904ef4c3
kasli: construct DRTIO-EEM modules before adding RTIO
2023-09-04 12:05:45 +08:00
occheung
838cc80922
EFC: Implement OOB reset
2023-09-03 10:25:08 +08:00
occheung
df99450faa
shuttler: add pdq-based waveform generator
2023-08-30 23:38:39 +08:00
linuswck
ddb2b5e3a1
efc: add shuttler DAC parallel data interface pads
2023-08-30 10:25:39 +08:00
linuswck
b56f7e429a
drtio: rename drtio_transceiver to gt_drtio
2023-08-28 04:50:46 +00:00
Sebastien Bourdeauducq
3452d0c423
efc: use variant (expected everywhere else)
2023-08-25 15:52:40 +08:00
Sebastien Bourdeauducq
f5cbca9c29
kasli: implement DRTIO-over-EEM
2023-08-25 12:47:33 +08:00
linuswck
737ff79ae7
eem: add efc
2023-08-25 12:01:17 +08:00
linuswck
dc97d3aee6
drtio-eem: CONFIG_EEM_TRANSCEIVERS -> CONFIG_EEM_DRTIO_COUNT
2023-08-25 11:49:39 +08:00
Sebastien Bourdeauducq
5d38db19d0
drtio-eem: remove unnecessary rtio_rx clock domain
2023-08-25 11:32:28 +08:00
linuswck
cd22e42cb4
efc: add DRTIO virtual LEDs
...
- EFC Gateware: Add virtual_leds to rtio
- EFC Firmware: io_expander is kept being serviced to update
virtual_leds after init
2023-08-23 06:21:14 +00:00
linuswck
b7bac8c9d8
EFC: Add SPI Gateware for Shuttler DAC
...
- Verified by a functional test reading back the rev register
2023-08-23 09:04:16 +08:00
occheung
68dd0e029f
targets: add efc target
2023-08-10 00:02:01 +00:00
occheung
64d3f867a0
add DRTIO-over-EEM PHY
...
for EFC and perhaps Phaser
2023-08-09 23:59:40 +00:00
Jonathan Coates
9a84575649
eem_7series: fix typo in 77293d5
...
Signed-off-by: Jonathan Coates <jonathan.coates@oxionics.com>
2023-07-11 23:09:15 +00:00
Sebastien Bourdeauducq
48bc8a2ecc
gtx_7series_init: GTH -> GTX (NFC)
2023-07-10 11:26:07 +08:00
Denis Ovchinnikov
93882eb3ce
kasli-soc: fix of SYS CLK switch failure
...
Change initialization behaviour of GTX transceivers
--
Modify the config parms CPLL of GTX transceiver for PLL to lock correctly
Modify the enabling requirement of GTX input clock buffer IBUFDS_GTE2 so
that it depends on GTX PLL locked signal instead of TX Init Done
Modify the GTX Init FSM so that BruteForceClock Aligner can reset GTX
transceiver without resetting the GTX transceiver PLL
kasli-soc: fix of SYS CLK switch failure
Changed initialization of GTX transceivers.
Successful SYS CLK switching requires IBUFDS_GTE2 to be properly enabled and not disabled during GTX transceiver initialization.
For this reason, CPLL is not reset during GTX initialization and clock alignment.
kasli-soc: refractor fix of SYS CLK switch failure
Remove gtXxreset & cpllreset assertion and deassertion
The removed code does not affect the fix
2023-07-10 03:24:28 +00:00
Sebastien Bourdeauducq
77293d53e3
json: use schema defaults when applicable
2023-06-16 16:59:08 +08:00
Sebastien Bourdeauducq
a792bc5456
json: factor handling of deprecated 'base'
2023-06-16 16:32:42 +08:00
Sebastien Bourdeauducq
20d4712815
json: base -> drtio_role
2023-06-16 16:17:31 +08:00
Spaqin
82bd913f63
satellites: add kernel cpu
2023-06-16 15:44:31 +08:00
mwojcik
29cb7e785d
fix missing DIFF_TERM for Sampler and Mirny inputs
2023-06-02 17:21:00 +08:00
Denis Ovchinnikov
22e2514ce6
update configuration of IBUFDS_GTE2
...
Input clock is terminated internally with 50 Ohm on each leg and to 4/5 MGTAVCC.
2023-05-30 11:42:51 +08:00
Sebastien Bourdeauducq
58cc3b8d0a
kasli_generic: fix LooseVersion deprecation warning
2023-05-23 19:36:06 +08:00
Jonathan Coates
ea9fe9b4e1
dma: fix off-by-one error in RawSlicer ( #2090 )
...
Signed-off-by: Jonathan Coates <jonathan.coates@oxionics.com>
2023-05-23 11:15:39 +08:00
mwojcik
0b03126038
satman: support analyzer packets
2023-05-19 11:39:14 +08:00
mwojcik
c36b6b3b65
master: only local rtio events in analyzer
2023-05-19 11:39:14 +08:00
mwojcik
c0ca27e6cf
satellite: add rtio_analyzer, only for local rtio
2023-05-19 11:39:14 +08:00
mwojcik
a533f2a0cd
rtio: SED, InputCollector use rio clock domain
2023-04-28 17:49:12 +08:00
mwojcik
90a6fe1c35
satellite: add dma to gateware
2023-02-23 17:33:23 +08:00