forked from M-Labs/artiq
firmware/ad9154: cleanup sysref scan and run everytime
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1364cd2948
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fedf7f0c87
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@ -608,13 +608,10 @@ fn dac_cfg_retry(dacno: u8) -> Result<(), &'static str> {
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dac_cfg(dacno)
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}
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#[allow(dead_code)]
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fn dac_sysref_scan(dacno: u8) {
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let mut sync_error_last = 0u16;
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let mut phase_min_found = false;
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let mut phase_min = 0u16;
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let mut _phase_max_found = false;
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let mut phase_max = 0u16;
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let mut sync_error_last = 0;
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let mut phase_min = None;
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let mut phase_max = None;
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info!("AD9154-{} SYSREF scan/conf...", dacno);
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for phase in 0..512 {
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@ -628,23 +625,19 @@ fn dac_sysref_scan(dacno: u8) {
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info!(" phase: {}, sync error: {}", phase, sync_error);
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}
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if sync_error != 0 {
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if phase_min_found {
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if phase_min.is_some() {
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if sync_error != sync_error_last {
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_phase_max_found = true;
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phase_max = phase - 1;
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phase_max = Some(phase - 1);
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break;
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}
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} else {
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phase_min_found = true;
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phase_min = phase;
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phase_min = Some(phase);
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}
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}
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sync_error_last = sync_error;
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}
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let phase_opt = phase_min + (phase_max-phase_min)/2;
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info!(" phase min: {}, phase max: {}, phase opt: {}", phase_min, phase_max, phase_opt);
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hmc7043::cfg_dac_sysref(dacno, phase_opt);
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info!(" phase min: {:?}, phase max: {:?}", phase_min, phase_max);
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}
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fn dac_sysref_cfg(dacno: u8, phase: u16) {
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@ -660,6 +653,7 @@ pub fn init() -> Result<(), &'static str> {
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for dacno in 0..csr::AD9154.len() {
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let dacno = dacno as u8;
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debug!("setting up AD9154-{} DAC...", dacno);
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dac_sysref_scan(dacno);
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dac_sysref_cfg(dacno, 88);
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dac_cfg_retry(dacno)?;
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dac_prbs(dacno)?;
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