forked from M-Labs/artiq
serdes_s6: no need to reset
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@ -103,8 +103,7 @@ class _OSERDES2_4X(Module):
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p_DATA_WIDTH=4, p_OUTPUT_MODE="SINGLE_ENDED",
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i_TRAIN=0, i_CLK0=ClockSignal("rtiox4"),
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i_CLK1=0, i_CLKDIV=ClockSignal("rio_phy"),
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i_IOCE=stb, i_OCE=1, i_TCE=1,
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i_RST=ResetSignal(),
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i_IOCE=stb, i_OCE=1, i_TCE=1, i_RST=0,
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i_T4=self.t_in, i_T3=self.t_in,
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i_T2=self.t_in, i_T1=self.t_in,
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i_D4=o[3], i_D3=o[2], i_D2=o[1], i_D1=o[0],
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