srenblad/artiq
1
0
Fork 0
forked from M-Labs/artiq
Code Pull Requests Activity

suservo: add pgia spi channel

Browse Source
This commit is contained in:
Robert Jördens 2018-04-25 16:23:30 +00:00
parent c83305065a
commit f9b2c32739
1 changed files with 6 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
artiq/gateware/targets/kasli.py
View File

@ -547,6 +547,12 @@ class SUServo(_StandaloneBase):
self.submodules += mem
rtio_channels.append(rtio.Channel.from_phy(mem, ififo_depth=4))
# EEM3: Sampler
phy = spi2.SPIMaster(self.platform.request("eem3_pgia_spi_p"),
self.platform.request("eem3_pgia_spi_n"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
# EEM5 + EEM4: Urukul
phy = spi2.SPIMaster(self.platform.request("eem5_spi_p"),
self.platform.request("eem5_spi_n"))