forked from M-Labs/artiq
transforms.llvm_ir_generator: handle loop instruction (fixes #202).
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@ -1089,6 +1089,8 @@ class LLVMIRGenerator:
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return self.llbuilder.cbranch(self.map(insn.condition()),
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return self.llbuilder.cbranch(self.map(insn.condition()),
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self.map(insn.if_true()), self.map(insn.if_false()))
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self.map(insn.if_true()), self.map(insn.if_false()))
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process_Loop = process_BranchIf
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def process_IndirectBranch(self, insn):
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def process_IndirectBranch(self, insn):
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llinsn = self.llbuilder.branch_indirect(self.map(insn.target()))
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llinsn = self.llbuilder.branch_indirect(self.map(insn.target()))
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for dest in insn.destinations():
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for dest in insn.destinations():
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