forked from M-Labs/artiq
drtio: squelch 7series RXSynchronizer outputs when MMCM is unlocked
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6a75837261
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f76aa249ce
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@ -212,10 +212,11 @@ class RXSynchronizer(Module, AutoCSR):
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self.phase_shift = CSR()
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self.phase_shift_done = CSRStatus()
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self.clock_domains.cd_rtio_delayed = ClockDomain(reset_less=True)
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self.clock_domains.cd_rtio_delayed = ClockDomain()
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mmcm_output = Signal()
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mmcm_fb = Signal()
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mmcm_locked = Signal()
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# maximize VCO frequency to maximize phase shift resolution
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mmcm_mult = 1200e6//rtio_clk_freq
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self.specials += [
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@ -242,7 +243,8 @@ class RXSynchronizer(Module, AutoCSR):
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i_PSINCDEC=self.phase_shift.r,
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o_PSDONE=self.phase_shift_done.status,
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),
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Instance("BUFR", i_I=mmcm_output, o_O=self.cd_rtio_delayed.clk)
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Instance("BUFR", i_I=mmcm_output, o_O=self.cd_rtio_delayed.clk),
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AsyncResetSynchronizer(self.cd_rtio_delayed, ~mmcm_locked)
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]
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def resync(self, signal):
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