forked from M-Labs/artiq
sdram: clean up console output
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206664afd9
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@ -367,8 +367,9 @@ mod ddr {
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}
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if max_delay <= min_delay {
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log!(logger, "Zero window: {}: {}-{}\n",
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DQS_SIGNAL_COUNT - n - 1, min_delay, max_delay);
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log!(logger, "Zero window: {}: {}-{} ({})\n",
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DQS_SIGNAL_COUNT - n - 1, min_delay, max_delay,
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max_seen_valid);
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return false
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}
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if max_seen_valid <= 5 {
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@ -379,9 +380,7 @@ mod ddr {
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}
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let mean_delay = (min_delay + max_delay) / 2;
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log!(logger, "{}: {}+-{}, ",
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DQS_SIGNAL_COUNT - n - 1, mean_delay,
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max_seen_valid / 2);
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log!(logger, "{}+-{} ", mean_delay, max_seen_valid / 2);
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// Set delay to the middle
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ddrphy::rdly_dq_rst_write(1);
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