From f2632e0fd1e9d1178f2c2ed0d11162df26424e66 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Wed, 28 Jun 2017 20:12:25 +0200 Subject: [PATCH] sawg: adapt latency to fir changes closes #748 --- artiq/gateware/dsp/sawg.py | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/artiq/gateware/dsp/sawg.py b/artiq/gateware/dsp/sawg.py index eae776c84..f13ecf79b 100644 --- a/artiq/gateware/dsp/sawg.py +++ b/artiq/gateware/dsp/sawg.py @@ -80,6 +80,8 @@ class SplineParallelDDS(SplineParallelDUC): [eqh(x, a.o.a0) for x in self.xi], [y.eq(0) for y in self.yi], ] + del self.xi + del self.yi class Config(Module): @@ -157,10 +159,10 @@ class Channel(Module, SatAddMixin): self.parallelism = parallelism self.cordic_gain = a2.gain*b.gain - self.u.latency += 1 - b.p.latency += 2 - b.f.latency += 2 - a_latency_delta = hbf[0].latency + b.latency + 2 + self.u.latency += 1 # self.o + b.p.latency += 1 # self.o + b.f.latency += 1 # self.o + a_latency_delta = hbf[0].latency + b.latency + 2 # hbf.i, self.o for a in a1, a2: a.a.latency += a_latency_delta a.p.latency += a_latency_delta