srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

dac34h84: unflip spectrum, clear nco

This commit is contained in:
Robert Jördens 2020-09-23 08:35:56 +00:00
parent 50b4eb4840
commit ef65ee18bd
1 changed files with 22 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
artiq/coredevice/dac34h84.py
View File

@ -72,6 +72,13 @@ class DAC34H84:
qmc_phasecd = 0 # 12b qmc_phasecd = 0 # 12b
phase_offsetab = 0 # 16b
phase_offsetcd = 0 # 16b
phase_addab_lsb = 0 # 16b
phase_addab_msb = 0 # 16b
phase_addcd_lsb = 0 # 16b
phase_addcd_msb = 0 # 16b
pll_reset = 0 pll_reset = 0
pll_ndivsync_ena = 1 pll_ndivsync_ena = 1
pll_ena = 1 pll_ena = 1
@ -109,15 +116,15 @@ class DAC34H84:
syncsel_fifoout = 0b0100 # ostr syncsel_fifoout = 0b0100 # ostr
clkdiv_sync_sel = 0 # ostr clkdiv_sync_sel = 0 # ostr
path_a_sel = 0b00 path_a_sel = 0
path_b_sel = 0b01 path_b_sel = 1
path_c_sel = 0b10 path_c_sel = 2
path_d_sel = 0b11 path_d_sel = 3
# reverse dacs (DCBA) for spectral inversion and layout # swap dac pairs (CDAB) for layout
dac_a_sel = 0b11 dac_a_sel = 2
dac_b_sel = 0b10 dac_b_sel = 3
dac_c_sel = 0b01 dac_c_sel = 0
dac_d_sel = 0b00 dac_d_sel = 1
dac_sleep_en = 0b1111 # msb a dac_sleep_en = 0b1111 # msb a
clkrecv_sleep_en = 1 clkrecv_sleep_en = 1
@ -201,6 +208,12 @@ class DAC34H84:
(self.qmc_gaind << 0)) (self.qmc_gaind << 0))
mmap.append((0x10 << 16) | (self.qmc_phaseab << 0)) mmap.append((0x10 << 16) | (self.qmc_phaseab << 0))
mmap.append((0x11 << 16) | (self.qmc_phasecd << 0)) mmap.append((0x11 << 16) | (self.qmc_phasecd << 0))
mmap.append((0x12 << 16) | (self.phase_offsetab << 0))
mmap.append((0x13 << 16) | (self.phase_offsetcd << 0))
mmap.append((0x14 << 16) | (self.phase_addab_lsb << 0))
mmap.append((0x15 << 16) | (self.phase_addab_msb << 0))
mmap.append((0x16 << 16) | (self.phase_addcd_lsb << 0))
mmap.append((0x17 << 16) | (self.phase_addcd_msb << 0))
mmap.append( mmap.append(
(0x18 << 16) | (0x18 << 16) |
(0b001 << 13) | (self.pll_reset << 12) | (0b001 << 13) | (self.pll_reset << 12) |