forked from M-Labs/artiq
travis: refactor get-misoc.sh
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@ -15,11 +15,7 @@ before_install:
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- ./.travis/get-xilinx.sh
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- ./.travis/get-anaconda.sh pip coverage numpy scipy sphinx h5py pyserial dateutil
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- source $HOME/miniconda/bin/activate py34
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- sudo apt-get install --force-yes -y iverilog
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- pip install --src . -e 'git+https://github.com/m-labs/migen.git@master#egg=migen'
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- mkdir vpi
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- iverilog-vpi --name=vpi/migensim migen/vpi/main.c migen/vpi/ipc.c
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- git clone --recursive https://github.com/m-labs/misoc
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- ./.travis/get-misoc.sh
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- pip install --src . -e 'git+https://github.com/nist-ionstorage/llvmlite.git@artiq#egg=llvmlite'
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- pip install coveralls
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install:
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6
.travis/get-misoc.sh
Executable file
6
.travis/get-misoc.sh
Executable file
@ -0,0 +1,6 @@
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#!/bin/sh
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sudo apt-get install --force-yes -y iverilog
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pip install --src . -e 'git+https://github.com/m-labs/migen.git@master#egg=migen'
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mkdir vpi && iverilog-vpi --name=vpi/migensim migen/vpi/main.c migen/vpi/ipc.c
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git clone --recursive https://github.com/m-labs/misoc
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