forked from M-Labs/artiq
gateware: fix Sayma satellite build.
RTIO clock multiplier was removed from Sayma in 32f22f4c
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4ed9fdbf27
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ee4c475cf3
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@ -389,7 +389,6 @@ class Satellite(BaseSoC):
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self.submodules += Microscope(platform.request("serial", 1),
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self.clk_freq)
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self.submodules.rtio_clkmul = _RTIOClockMultiplier(platform, rtio_clk_freq)
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rtio_channels = []
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for i in range(4):
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phy = ttl_simple.Output(platform.request("user_led", i))
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