forked from M-Labs/artiq
ttl_serdes: detect edges on short pulses
Edges on pulses shorter than the RTIO period were missed because the reference sample and the last sample of the serdes word are the same. This change enables detection of edges on pulses as short as the serdes UI (and shorter as long as the pulse still hits a serdes sample aperture). In any RTIO period, only the leading event corresponding to the first edge with slope according to sensitivity is registerd. If the channel is sensitive to both rising and falling edges and if the pulse is contained within an RTIO period, or if it is sensitive only to one edge slope and there are multiple pulses in an RTIO period, only the leading event is seen. Thus this possibility of lost events is still there. Only the conditions under which loss occurs are reduced. In testing with the kasli-ptb6 variant, this also improves resource usage (a couple hundred LUT) and timing (0.1 ns WNS).
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@ -8,6 +8,10 @@ ARTIQ-6
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Highlights:
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Highlights:
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* Performance improvements:
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- #1432: SERDES TTL inputs can now detect edges on pulses that are shorter
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than the RTIO period
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Breaking changes:
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Breaking changes:
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@ -7,7 +7,7 @@ from artiq.gateware.rtio import rtlink
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def _mk_edges(w, direction):
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def _mk_edges(w, direction):
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l = [(1 << i) - 1 for i in range(w)]
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l = [(1 << i) - 1 for i in range(w)]
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if direction == "rising":
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if direction == "rising":
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l = [2**w - 1 ^ x for x in l]
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l = [((1 << w) - 1) ^ x for x in l]
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elif direction == "falling":
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elif direction == "falling":
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pass
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pass
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else:
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else:
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@ -69,8 +69,8 @@ class InOut(Module):
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# Output enable, for interfacing to external buffers.
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# Output enable, for interfacing to external buffers.
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self.oe = Signal()
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self.oe = Signal()
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# LSB of the input state (for edge detection; arbitrary choice, support for
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# input state exposed for edge_counter: latest serdes sample
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# short pulses will need a more involved solution).
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# support for short pulses will need a more involved solution
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self.input_state = Signal()
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self.input_state = Signal()
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# # #
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# # #
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@ -112,15 +112,16 @@ class InOut(Module):
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i_d = Signal()
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i_d = Signal()
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self.sync.rio_phy += [
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self.sync.rio_phy += [
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i_d.eq(i),
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i_d.eq(i),
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self.rtlink.i.stb.eq(
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sample |
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(sensitivity[0] & ( i & ~i_d)) |
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(sensitivity[1] & (~i & i_d))
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),
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self.rtlink.i.data.eq(i),
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self.rtlink.i.data.eq(i),
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]
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]
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pe = PriorityEncoder(serdes_width)
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pe = PriorityEncoder(serdes_width)
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self.submodules += pe
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self.submodules += pe
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self.comb += pe.i.eq(serdes.i ^ Replicate(i_d, serdes_width))
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self.comb += pe.i.eq(
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self.sync.rio_phy += self.rtlink.i.fine_ts.eq(pe.o)
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(serdes.i ^ Cat(i_d, serdes.i)) & (
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(serdes.i & Replicate(sensitivity[0], serdes_width)) |
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(~serdes.i & Replicate(sensitivity[1], serdes_width))))
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self.sync.rio_phy += [
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self.rtlink.i.fine_ts.eq(pe.o),
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self.rtlink.i.stb.eq(sample | ~pe.n),
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]
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