From ea3bce6fe34a4258cea834796272ccf60de0a7df Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Mon, 13 Jan 2020 20:43:34 +0800
Subject: [PATCH] wrpll: wait for settling time after setting ADPLL

---
 artiq/firmware/libboard_artiq/wrpll.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/artiq/firmware/libboard_artiq/wrpll.rs b/artiq/firmware/libboard_artiq/wrpll.rs
index bb24d8f16..fbf133d4b 100644
--- a/artiq/firmware/libboard_artiq/wrpll.rs
+++ b/artiq/firmware/libboard_artiq/wrpll.rs
@@ -267,6 +267,7 @@ mod si549 {
         write(dcxo, 231, adpll as u8)?;
         write(dcxo, 232, (adpll >> 8) as u8)?;
         write(dcxo, 233, (adpll >> 16) as u8)?;
+        clock::spin_us(100);
         Ok(())
     }
 }