forked from M-Labs/artiq
drtio: remove obsolete CSR accesses from test
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@ -123,10 +123,8 @@ class TestFullStack(unittest.TestCase):
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while status:
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while status:
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status = yield from kcsrs.o_status.read()
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status = yield from kcsrs.o_status.read()
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if status & 2:
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if status & 2:
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yield from kcsrs.o_underflow_reset.write(1)
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raise RTIOUnderflow
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raise RTIOUnderflow
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if status & 4:
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if status & 4:
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yield from kcsrs.o_sequence_error_reset.write(1)
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raise RTIOSequenceError
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raise RTIOSequenceError
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yield
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yield
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wlen += 1
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wlen += 1
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