From e99061b0134499c292ebdc67d14d95fb6bb69879 Mon Sep 17 00:00:00 2001 From: occheung Date: Fri, 6 Aug 2021 11:05:17 +0800 Subject: [PATCH] runtime: add riscv --- artiq/firmware/runtime/Cargo.toml | 1 + artiq/firmware/runtime/main.rs | 3 +++ 2 files changed, 4 insertions(+) diff --git a/artiq/firmware/runtime/Cargo.toml b/artiq/firmware/runtime/Cargo.toml index bbb9877bb..f8139cc57 100644 --- a/artiq/firmware/runtime/Cargo.toml +++ b/artiq/firmware/runtime/Cargo.toml @@ -28,6 +28,7 @@ logger_artiq = { path = "../liblogger_artiq" } board_artiq = { path = "../libboard_artiq" } proto_artiq = { path = "../libproto_artiq", features = ["log", "alloc"] } smoltcp = { version = "0.6.0", default-features = false, features = ["rust-1_28", "alloc", "ethernet", "proto-ipv4", "proto-ipv6", "socket-tcp"] } +riscv = { version = "0.6.0", features = ["inline-asm"] } [dependencies.fringe] git = "https://github.com/m-labs/libfringe" diff --git a/artiq/firmware/runtime/main.rs b/artiq/firmware/runtime/main.rs index 089a1c1b0..590f99564 100644 --- a/artiq/firmware/runtime/main.rs +++ b/artiq/firmware/runtime/main.rs @@ -25,6 +25,7 @@ extern crate board_misoc; extern crate board_artiq; extern crate logger_artiq; extern crate proto_artiq; +extern crate riscv; use core::cell::RefCell; use core::convert::TryFrom; @@ -41,6 +42,8 @@ use proto_artiq::{mgmt_proto, moninj_proto, rpc_proto, session_proto, kernel_pro #[cfg(has_rtio_analyzer)] use proto_artiq::analyzer_proto; +use riscv::register::{mcause, mepc}; + mod rtio_clocking; mod rtio_mgt;