From e9092edb98dd7f99bc644bc4f20ef1643bd2ae4f Mon Sep 17 00:00:00 2001
From: Yann Sionneau <ys@m-labs.hk>
Date: Thu, 19 Mar 2015 16:50:14 +0100
Subject: [PATCH] Remove one RTIO out channel to free up some space for travis
 builds to succeed

---
 soc/targets/artiq_ppro.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/soc/targets/artiq_ppro.py b/soc/targets/artiq_ppro.py
index cc80a220f..de7f28b5f 100644
--- a/soc/targets/artiq_ppro.py
+++ b/soc/targets/artiq_ppro.py
@@ -111,7 +111,7 @@ class ARTIQMiniSoC(BaseSoC):
             platform.request("ttl_h_tx_en").eq(1)
         ]
         rtio_ins = [platform.request("pmt") for i in range(2)]
-        rtio_outs = [platform.request("ttl", i) for i in range(6)] + [fud]
+        rtio_outs = [platform.request("ttl", i) for i in range(5)] + [fud]
 
         self.submodules.rtiocrg = _RTIOMiniCRG(platform)
         self.submodules.rtiophy = rtio.phy.SimplePHY(