kasli/tester: fill all 12 EEM

artiq/examples/kasli_tester/device_db.py

@@ -39,6 +39,7 @@ device_db = {
 }
 
 
+# DIO (EEM5) starting at RTIO channel 0
 for i in range(8):
     device_db["ttl" + str(i)] = {
         "type": "local",
@@ -48,6 +49,7 @@ for i in range(8):
     }
 
 
+# Urukul (EEM1) starting at RTIO channel 8
 device_db.update(
     spi_urukul0={
         "type": "local",
@@ -112,6 +114,7 @@ for i in range(4):
     }
 
 
+# Sampler (EEM3) starting at RTIO channel 14
 device_db["spi_sampler0_adc"] = {
     "type": "local",
     "module": "artiq.coredevice.spi2",
@@ -142,6 +145,7 @@ device_db["sampler0"] = {
 }
 
 
+# Zotino (EEM4) starting at RTIO channel 17
 device_db["spi_zotino0"] = {
     "type": "local",
     "module": "artiq.coredevice.spi2",
@@ -171,18 +175,150 @@ device_db["zotino0"] = {
     }
 }
 
+
+# Grabber (EEM6) starting at RTIO channel 20
+device_db["grabber0"] = {
+    "type": "local",
+    "module": "artiq.coredevice.grabber",
+    "class": "Grabber",
+    "arguments": {"channel_base": 20}
+}
+
+
+# Urukul (EEM7) starting at RTIO channel 22
+device_db.update(
+    spi_urukul1={
+        "type": "local",
+        "module": "artiq.coredevice.spi2",
+        "class": "SPIMaster",
+        "arguments": {"channel": 22}
+    },
+    ttl_urukul1_io_update={
+        "type": "local",
+        "module": "artiq.coredevice.ttl",
+        "class": "TTLOut",
+        "arguments": {"channel": 23}
+    },
+    urukul1_cpld={
+        "type": "local",
+        "module": "artiq.coredevice.urukul",
+        "class": "CPLD",
+        "arguments": {
+            "spi_device": "spi_urukul1",
+            "io_update_device": "ttl_urukul1_io_update",
+            "refclk": 100e6,
+            "clk_sel": 1
+        }
+    }
+)
+
+for i in range(4):
+    device_db["urukul1_ch" + str(i)] = {
+        "type": "local",
+        "module": "artiq.coredevice.ad9912",
+        "class": "AD9912",
+        "arguments": {
+            "pll_n": 10,
+            "chip_select": 4 + i,
+            "cpld_device": "urukul1_cpld"
+        }
+    }
+
+
+# DIO (EEM8) starting at RTIO channel 24
+for i in range(8):
+    device_db["ttl" + str(8 + i)] = {
+        "type": "local",
+        "module": "artiq.coredevice.ttl",
+        "class": "TTLOut",
+        "arguments": {"channel": 24 + i},
+    }
+
+
+# DIO (EEM9) starting at RTIO channel 32
+for i in range(8):
+    device_db["ttl" + str(16 + i)] = {
+        "type": "local",
+        "module": "artiq.coredevice.ttl",
+        "class": "TTLOut",
+        "arguments": {"channel": 32 + i},
+    }
+
+
+# Sampler (EEM10) starting at RTIO channel 40
+device_db["spi_sampler1_adc"] = {
+    "type": "local",
+    "module": "artiq.coredevice.spi2",
+    "class": "SPIMaster",
+    "arguments": {"channel": 40}
+}
+device_db["spi_sampler1_pgia"] = {
+    "type": "local",
+    "module": "artiq.coredevice.spi2",
+    "class": "SPIMaster",
+    "arguments": {"channel": 41}
+}
+device_db["spi_sampler1_cnv"] = {
+    "type": "local",
+    "module": "artiq.coredevice.ttl",
+    "class": "TTLOut",
+    "arguments": {"channel": 42},
+}
+device_db["sampler1"] = {
+    "type": "local",
+    "module": "artiq.coredevice.sampler",
+    "class": "Sampler",
+    "arguments": {
+        "spi_adc_device": "spi_sampler1_adc",
+        "spi_pgia_device": "spi_sampler1_pgia",
+        "cnv_device": "spi_sampler1_cnv"
+    }
+}
+
+
+# Zotino (EEM11) starting at RTIO channel 43
+device_db["spi_zotino1"] = {
+    "type": "local",
+    "module": "artiq.coredevice.spi2",
+    "class": "SPIMaster",
+    "arguments": {"channel": 43}
+}
+device_db["ttl_zotino1_ldac"] = {
+    "type": "local",
+    "module": "artiq.coredevice.ttl",
+    "class": "TTLOut",
+    "arguments": {"channel": 44}
+}
+device_db["ttl_zotino1_clr"] = {
+    "type": "local",
+    "module": "artiq.coredevice.ttl",
+    "class": "TTLOut",
+    "arguments": {"channel": 45}
+}
+device_db["zotino1"] = {
+    "type": "local",
+    "module": "artiq.coredevice.zotino",
+    "class": "Zotino",
+    "arguments": {
+        "spi_device": "spi_zotino1",
+        "ldac_device": "ttl_zotino1_ldac",
+        "clr_device": "ttl_zotino1_clr"
+    }
+}
+
+
 device_db.update(
     led0={
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
-        "arguments": {"channel": 20}
+        "arguments": {"channel": 46}
     },
     led1={
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
-        "arguments": {"channel": 21}
+        "arguments": {"channel": 47}
     },
 )
 

artiq/gateware/targets/kasli.py

@@ -572,11 +572,20 @@ class Tester(_StandaloneBase):
             self.comb += self.platform.request("clk_sel").eq(1)
 
         self.rtio_channels = []
+        self.grabber_csr_group = []
         eem.DIO.add_std(self, 5,
             ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
         eem.Urukul.add_std(self, 1, 0, ttl_serdes_7series.Output_8X)
         eem.Sampler.add_std(self, 3, 2, ttl_serdes_7series.Output_8X)
         eem.Zotino.add_std(self, 4, ttl_serdes_7series.Output_8X)
+        eem.Grabber.add_std(self, 6)
+        eem.Urukul.add_std(self, 7, None, ttl_serdes_7series.Output_8X)
+        eem.DIO.add_std(self, 8,
+            ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
+        eem.DIO.add_std(self, 9,
+            ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
+        eem.Sampler.add_std(self, 10, None, ttl_serdes_7series.Output_8X)
+        eem.Zotino.add_std(self, 11, ttl_serdes_7series.Output_8X)
 
         for i in (1, 2):
             sfp_ctl = self.platform.request("sfp_ctl", i)
@@ -587,9 +596,13 @@ class Tester(_StandaloneBase):
         self.config["HAS_RTIO_LOG"] = None
         self.config["RTIO_LOG_CHANNEL"] = len(self.rtio_channels)
         self.rtio_channels.append(rtio.LogChannel())
-
         self.add_rtio(self.rtio_channels)
 
+        self.config["HAS_GRABBER"] = None
+        self.add_csr_group("grabber", self.grabber_csr_group)
+        self.platform.add_false_path_constraints(
+            self.rtio_crg.cd_rtio.clk, self.grabber0.deserializer.cd_cl.clk)
+
 
 class _RTIOClockMultiplier(Module):
     def __init__(self, rtio_clk_freq):