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urukul: slow down att write to datasheet limit 

Signed-off-by: Robert Jördens <rj@quartiq.de>
This commit is contained in:
Robert Jördens 2018-11-09 13:21:18 +01:00
parent 998be50f07
commit e565ca6b82
1 changed files with 2 additions and 1 deletions
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3
artiq/coredevice/urukul.py
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@ -14,7 +14,8 @@ SPI_CONFIG = (0*spi.SPI_OFFLINE | 0*spi.SPI_END |
# SPI clock write and read dividers # SPI clock write and read dividers
SPIT_CFG_WR = 2 SPIT_CFG_WR = 2
SPIT_CFG_RD = 16 SPIT_CFG_RD = 16
SPIT_ATT_WR = 2 # 30 MHz fmax, 20 ns setup, 40 ns shift to latch (limiting)
SPIT_ATT_WR = 6
SPIT_ATT_RD = 16 SPIT_ATT_RD = 16
SPIT_DDS_WR = 2 SPIT_DDS_WR = 2
SPIT_DDS_RD = 16 SPIT_DDS_RD = 16