forked from M-Labs/artiq
kasli: opticlock 125 MHz, mark external reference case broken
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e4db84e214
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e41f49cc75
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@ -110,18 +110,31 @@ fn startup() {
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#[cfg(si5324_free_running)]
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fn setup_si5324_free_running()
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{
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// 125MHz output, from 10MHz CLKIN2 reference
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// 125MHz output, from 100MHz CLKIN2 reference, 9 Hz
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// FIXME: needs !FREE_RUN at address 0x00
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#[cfg(all(rtio_frequency = "125.0", si5324_ext_ref))]
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const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
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= board_artiq::si5324::FrequencySettings {
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n1_hs : 10,
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 300,
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n31 : 75,
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n32 : 6,
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n2_ls : 260,
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n31 : 65,
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n32 : 52,
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bwsel : 10
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};
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// 125MHz output, from crystal, 7 Hz
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#[cfg(all(rtio_frequency = "125.0", not(si5324_ext_ref)))]
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const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
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= board_artiq::si5324::FrequencySettings {
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n1_hs : 10,
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 19972,
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n31 : 4993,
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n32 : 4565,
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bwsel : 4
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};
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// 150MHz output, from crystal
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#[cfg(all(rtio_frequency = "150.0", not(si5324_ext_ref)))]
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const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
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@ -230,7 +230,7 @@ class Opticlock(_StandaloneBase):
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_StandaloneBase.__init__(self, **kwargs)
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self.config["SI5324_FREE_RUNNING"] = None
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self.config["SI5324_EXT_REF"] = None
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# self.config["SI5324_EXT_REF"] = None
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self.config["RTIO_FREQUENCY"] = "125.0"
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platform = self.platform
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