forked from M-Labs/artiq
remove outdated kc705 examples
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5008302f88
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from artiq.experiment import *
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class AD53XXTest(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("fmcdio_dirctl")
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self.dac = self.get_device("dac_zotino")
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self.setattr_device("led")
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@kernel
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def run(self):
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self.core.reset()
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delay(5*ms) # build slack for shift register set
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self.fmcdio_dirctl.set(0x00008800)
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self.dac.init()
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self.led.on()
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delay(400*us)
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self.led.off()
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self.dac.set_dac_mu([i << 10 for i in range(32)])
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from artiq.experiment import *
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class UrukulTest(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("fmcdio_dirctl")
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self.setattr_device("urukul_cpld")
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self.setattr_device("urukul_ch0a")
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self.setattr_device("urukul_ch1a")
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self.setattr_device("urukul_ch2a")
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self.setattr_device("urukul_ch3a")
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self.setattr_device("urukul_ch0b")
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self.setattr_device("urukul_ch1b")
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self.setattr_device("urukul_ch2b")
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self.setattr_device("urukul_ch3b")
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self.setattr_device("led")
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@kernel
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def run(self):
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self.core.reset()
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self.led.on()
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delay(5*ms)
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# Zotino plus Urukul (MISO, IO_UPDATE_RET)
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self.fmcdio_dirctl.set(0x0A008800)
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self.led.off()
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self.urukul_cpld.init()
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self.urukul_ch0b.init()
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self.urukul_ch1b.init()
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self.urukul_ch2b.init()
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self.urukul_ch3b.init()
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delay(1000*us)
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self.urukul_ch0b.set(100*MHz)
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self.urukul_ch0b.sw.on()
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self.urukul_ch0b.set_att(10.)
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delay(1000*us)
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self.urukul_ch1b.set(10*MHz, 0.5)
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self.urukul_ch1b.sw.on()
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self.urukul_ch1b.set_att(0.)
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delay(1000*us)
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self.urukul_ch2b.set(400*MHz)
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self.urukul_ch2b.sw.on()
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self.urukul_ch2b.set_att(0.)
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delay(1000*us)
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self.urukul_ch3b.set(1*MHz)
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self.urukul_ch3b.sw.on()
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self.urukul_ch3b.set_att(20.)
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data = 0
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errors = 0
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delay(100*us)
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while data != -1:
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delay(20*us)
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self.urukul_ch0b.write32(0x07, data)
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self.urukul_cpld.io_update.pulse(1*us)
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read = self.urukul_ch0b.read32(0x07)
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if read != data:
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errors += 1
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if errors > 20:
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return
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data += 1
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while False:
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self.urukul_ch0b.sw.pulse(5*ms)
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delay(5*ms)
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while False:
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self.led.pulse(.5*s)
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delay(.5*s)
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@kernel
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def test_att_noise(self, n=1024):
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bus = self.urukul_cpld.bus
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bus.set_config_mu(_SPI_CONFIG, _SPIT_ATT_WR, _SPIT_ATT_RD)
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bus.set_xfer(CS_ATT, 32, 0)
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for i in range(n):
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delay(5*us)
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bus.write(self.att_reg)
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bus.set_config_mu(_SPI_CONFIG, _SPIT_DDS_WR, _SPIT_DDS_RD)
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