From e2cb0e107f5e3636459517659266c50ff2674844 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Sun, 28 Jun 2015 21:11:41 -0600 Subject: [PATCH] pipistrello: really do not request xtrig --- soc/targets/artiq_pipistrello.py | 5 ----- 1 file changed, 5 deletions(-) diff --git a/soc/targets/artiq_pipistrello.py b/soc/targets/artiq_pipistrello.py index 65b6e4cea..ddc42a8dd 100644 --- a/soc/targets/artiq_pipistrello.py +++ b/soc/targets/artiq_pipistrello.py @@ -98,11 +98,6 @@ trce -v 12 -fastpaths -tsi {build_name}.tsi -o {build_name}.twr {build_name}.ncd rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512, ofifo_depth=4)) - phy = ttl_simple.Inout(platform.request("xtrig")) - self.submodules += phy - rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4, - ofifo_depth=4)) - for i in range(16): phy = ttl_simple.Output(platform.request("ttl", i)) self.submodules += phy