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sayma, metlino: increase integrated_sram_size on Ethernet-enabled variants

This commit is contained in:
Sebastien Bourdeauducq 2019-10-30 21:36:00 +08:00
parent 3042476230
commit dc71039934
2 changed files with 2 additions and 0 deletions
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1
artiq/gateware/targets/metlino.py
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@ -43,6 +43,7 @@ class Master(MiniSoC, AMPSoC):
cpu_type="or1k", cpu_type="or1k",
sdram_controller_type="minicon", sdram_controller_type="minicon",
l2_size=128*1024, l2_size=128*1024,
integrated_sram_size=8192,
ethmac_nrxslots=4, ethmac_nrxslots=4,
ethmac_ntxslots=4, ethmac_ntxslots=4,
**kwargs) **kwargs)

1
artiq/gateware/targets/sayma_amc.py
View File

@ -340,6 +340,7 @@ class Master(MiniSoC, AMPSoC):
cpu_type="or1k", cpu_type="or1k",
sdram_controller_type="minicon", sdram_controller_type="minicon",
l2_size=128*1024, l2_size=128*1024,
integrated_sram_size=8192,
ethmac_nrxslots=4, ethmac_nrxslots=4,
ethmac_ntxslots=4, ethmac_ntxslots=4,
**kwargs) **kwargs)