forked from M-Labs/artiq
wrpll: support differential DDMTD inputs
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3851a02a3a
commit
da9237de53
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@ -23,5 +23,19 @@ class WRPLL(Module, AutoCSR):
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ddmtd_counter = Signal(N)
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self.sync.helper += ddmtd_counter.eq(ddmtd_counter + 1)
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self.submodules.ddmtd_helper = DDMTD(ddmtd_counter, ddmtd_inputs.rec_clk)
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self.submodules.ddmtd_main = DDMTD(ddmtd_counter, ddmtd_inputs.main_xo)
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if hasattr(ddmtd_inputs, "rec_clk"):
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ddmtd_input_rec_clk = ddmtd_inputs.rec_clk
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else:
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ddmtd_input_rec_clk = Signal()
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self.specials += Instance("IBUFDS",
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i_I=ddmtd_inputs.rec_clk_p, i_IB=ddmtd_inputs.rec_clk_n,
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o_O=ddmtd_input_rec_clk)
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if hasattr(ddmtd_inputs, "main_xo"):
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ddmtd_input_main_xo = ddmtd_inputs.main_xo
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else:
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ddmtd_input_main_xo = Signal()
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self.specials += Instance("IBUFDS",
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i_I=ddmtd_inputs.main_xo_p, i_IB=ddmtd_inputs.main_xo_n,
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o_O=ddmtd_input_main_xo)
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self.submodules.ddmtd_helper = DDMTD(ddmtd_counter, ddmtd_input_rec_clk)
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self.submodules.ddmtd_main = DDMTD(ddmtd_counter, ddmtd_input_main_xo)
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