From d8b9543e1b4063348c62687e9b4b05f740096a54 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Wed, 17 Sep 2014 19:53:06 +0800 Subject: [PATCH] rtio: use FWFT FIFO with no buffering. This fixes replace operations. --- soc/artiqlib/rtio/core.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/soc/artiqlib/rtio/core.py b/soc/artiqlib/rtio/core.py index 3c7d44d27..6e50775cd 100644 --- a/soc/artiqlib/rtio/core.py +++ b/soc/artiqlib/rtio/core.py @@ -1,6 +1,6 @@ from migen.fhdl.std import * from migen.bank.description import * -from migen.genlib.fifo import SyncFIFOBuffered +from migen.genlib.fifo import SyncFIFO from artiqlib.rtio.rbus import get_fine_ts_width @@ -31,7 +31,7 @@ class _RTIOBankO(Module): fifos = [] for n, chif in enumerate(rbus): - fifo = SyncFIFOBuffered([ + fifo = SyncFIFO([ ("timestamp", counter_width+fine_ts_width), ("value", 2)], 2 if chif.mini else fifo_depth) self.submodules += fifo @@ -89,7 +89,7 @@ class _RTIOBankI(Module): self.sync += If(~chif.oe & chif.o_stb, sensitivity.eq(chif.o_value)) - fifo = SyncFIFOBuffered([ + fifo = SyncFIFO([ ("timestamp", counter_width+fine_ts_width), ("value", 1)], fifo_depth) self.submodules += fifo