forked from M-Labs/artiq
doc: fix missing instructions for bypassing Si5324 on Kasli
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@ -287,9 +287,9 @@ For DRTIO systems, the startup kernel should wait until the desired destinations
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If you are using DRTIO and the default routing table (for a star topology) is not suitable to your needs, prepare and load a different routing table. See :ref:`Using DRTIO <using-drtio>`.
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* Select the RTIO clock source (KC705 only)
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* Select the RTIO clock source (KC705 and Kasli)
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The KC705 may use either an external clock signal or its internal clock. The clock is selected at power-up. Use one of these commands: ::
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The KC705 may use either an external clock signal or its internal clock. The clock is selected at power-up. For Kasli, setting the RTIO clock source to "external" would bypass the Si5324 synthesiser, requiring that an input clock be present. To select the source, use one of these commands: ::
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$ artiq_coremgmt config write -s rtio_clock i # internal clock (default)
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$ artiq_coremgmt config write -s rtio_clock e # external clock
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