From d29b3dd588e853c19f569e0b3ef0805d50ba64d6 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Tue, 19 Jun 2018 13:47:32 +0800
Subject: [PATCH] hmc830: compile-time configurable reference frequency

---
 artiq/firmware/libboard_artiq/hmc830_7043.rs | 8 +++++++-
 artiq/gateware/targets/sayma_amc.py          | 2 ++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/artiq/firmware/libboard_artiq/hmc830_7043.rs b/artiq/firmware/libboard_artiq/hmc830_7043.rs
index f9018084e..10651d0bf 100644
--- a/artiq/firmware/libboard_artiq/hmc830_7043.rs
+++ b/artiq/firmware/libboard_artiq/hmc830_7043.rs
@@ -330,7 +330,13 @@ pub fn init() -> Result<(), &'static str> {
     hmc830::select_spi_mode();
     hmc830::detect()?;
     hmc830::init();
-    hmc830::set_dividers(1, 24, 0, 2); // 100MHz ref, 1.2GHz out
+
+    // 1.2GHz out
+    #[cfg(hmc830_ref = "100")]
+    hmc830::set_dividers(1, 24, 0, 2);
+    #[cfg(hmc830_ref = "150")]
+    hmc830::set_dividers(2, 32, 0, 2);
+
     hmc830::check_locked()?;
 
     hmc7043::enable();
diff --git a/artiq/gateware/targets/sayma_amc.py b/artiq/gateware/targets/sayma_amc.py
index a6ad70a7c..76993f28c 100755
--- a/artiq/gateware/targets/sayma_amc.py
+++ b/artiq/gateware/targets/sayma_amc.py
@@ -204,6 +204,8 @@ class Standalone(MiniSoC, AMPSoC):
         self.submodules += serwb_core
         self.add_wb_slave(self.mem_map["serwb"], 8192, serwb_core.etherbone.wishbone.bus)
 
+        self.config["HMC830_REF"] = "100"
+
         # RTIO
         rtio_channels = []
         for i in range(4):