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test_compile: port to NAC3

This commit is contained in:
Sebastien Bourdeauducq 2022-06-06 23:56:14 +08:00
parent cc3d86ff12
commit d15d922236
1 changed files with 12 additions and 0 deletions
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12
artiq/test/coredevice/test_compile.py
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@ -3,6 +3,8 @@ import sys
import subprocess import subprocess
import unittest import unittest
import tempfile import tempfile
from artiq.coredevice.core import Core
from artiq.coredevice.comm_mgmt import CommMgmt from artiq.coredevice.comm_mgmt import CommMgmt
from artiq.test.hardware_testbench import ExperimentCase from artiq.test.hardware_testbench import ExperimentCase
from artiq.experiment import * from artiq.experiment import *
@ -11,7 +13,16 @@ from artiq.experiment import *
artiq_root = os.getenv("ARTIQ_ROOT") artiq_root = os.getenv("ARTIQ_ROOT")
# NAC3TODO https://git.m-labs.hk/M-Labs/nac3/issues/297
@extern
def core_log(s: str):
...
@nac3
class CheckLog(EnvExperiment): class CheckLog(EnvExperiment):
core: KernelInvariant[Core]
def build(self): def build(self):
self.setattr_device("core") self.setattr_device("core")
@ -20,6 +31,7 @@ class CheckLog(EnvExperiment):
core_log("test_artiq_compile") core_log("test_artiq_compile")
@unittest.skip("NAC3TODO https://git.m-labs.hk/M-Labs/nac3/issues/300")
class TestCompile(ExperimentCase): class TestCompile(ExperimentCase):
def test_compile(self): def test_compile(self):
core_addr = self.device_mgr.get_desc("core")["arguments"]["host"] core_addr = self.device_mgr.get_desc("core")["arguments"]["host"]