From cedecc3030c7a58b508069b7f1bdc3e28c142880 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Wed, 28 Feb 2018 18:43:56 +0100 Subject: [PATCH] Revert "firmware: Sayma RTM FPGA bitstream loading prototype (#813)." This reverts commit f95fb273f145a42d5e7d4ec3008a4f1fdb8f1901. Will be replaced with a bitbang/GPIO based version. --- artiq/firmware/libboard_artiq/lib.rs | 3 +- artiq/firmware/libboard_artiq/rtm_fpga.rs | 46 ----------------------- artiq/firmware/runtime/main.rs | 12 ++---- artiq/frontend/artiq_flash.py | 30 ++++----------- 4 files changed, 12 insertions(+), 79 deletions(-) delete mode 100644 artiq/firmware/libboard_artiq/rtm_fpga.rs diff --git a/artiq/firmware/libboard_artiq/lib.rs b/artiq/firmware/libboard_artiq/lib.rs index a0f1a5c8a..127a55db8 100644 --- a/artiq/firmware/libboard_artiq/lib.rs +++ b/artiq/firmware/libboard_artiq/lib.rs @@ -1,3 +1,4 @@ +#![feature(asm, lang_items)] #![no_std] #[macro_use] @@ -24,5 +25,3 @@ mod ad9154_reg; pub mod ad9154; #[cfg(has_allaki_atts)] pub mod hmc542; -#[cfg(has_rtm_fpga_cfg)] -pub mod rtm_fpga; diff --git a/artiq/firmware/libboard_artiq/rtm_fpga.rs b/artiq/firmware/libboard_artiq/rtm_fpga.rs deleted file mode 100644 index 88fc6730e..000000000 --- a/artiq/firmware/libboard_artiq/rtm_fpga.rs +++ /dev/null @@ -1,46 +0,0 @@ -use core::slice; -use board::csr::rtm_fpga_cfg; -use board::clock; - -const ADDR: *const u8 = 0x150000 as *const u8; - -pub fn program_bitstream() -> Result<(), ()> { - unsafe { - let length = *(ADDR as *const usize); - let bitstream = slice::from_raw_parts(ADDR.offset(4) as *const u32, length / 4); - - debug!("resetting"); - - rtm_fpga_cfg::divisor_write(15); - rtm_fpga_cfg::program_write(1); - clock::spin_us(1000); - rtm_fpga_cfg::program_write(0); - clock::spin_us(1000); - - while rtm_fpga_cfg::error_read() != 0 {} - - debug!("programming"); - - for word in bitstream { - rtm_fpga_cfg::data_write(*word); - rtm_fpga_cfg::start_write(1); - while rtm_fpga_cfg::busy_read() == 1 {} - } - - debug!("finishing"); - - loop { - if rtm_fpga_cfg::error_read() != 0 { - error!("programming error"); - - return Err(()) - } - - if rtm_fpga_cfg::done_read() != 0 { - debug!("done"); - - return Ok(()) - } - } - } -} diff --git a/artiq/firmware/runtime/main.rs b/artiq/firmware/runtime/main.rs index 6b6765195..21d0edf85 100644 --- a/artiq/firmware/runtime/main.rs +++ b/artiq/firmware/runtime/main.rs @@ -49,20 +49,11 @@ mod moninj; mod analyzer; fn startup() { - log::set_max_level(log::LevelFilter::TRACE); - logger_artiq::BufferLogger::with(|logger| - logger.set_uart_log_level(log::LevelFilter::TRACE)); - board::clock::init(); info!("ARTIQ runtime starting..."); info!("software version {}", include_str!(concat!(env!("OUT_DIR"), "/git-describe"))); info!("gateware version {}", board::ident::read(&mut [0; 64])); - #[cfg(has_rtm_fpga_cfg)] - board_artiq::rtm_fpga::program_bitstream().expect("cannot program RTM FPGA"); - #[cfg(has_serwb_phy_amc)] - board_artiq::serwb::wait_init(); - match config::read_str("log_level", |r| r.map(|s| s.parse())) { Ok(Ok(log_level_filter)) => { info!("log level set to {} by `log_level` config key", @@ -81,6 +72,9 @@ fn startup() { _ => info!("UART log level set to INFO by default") } + #[cfg(has_serwb_phy_amc)] + board_artiq::serwb::wait_init(); + let t = board::clock::get_ms(); info!("press 'e' to erase startup and idle kernels..."); while board::clock::get_ms() < t + 1000 { diff --git a/artiq/frontend/artiq_flash.py b/artiq/frontend/artiq_flash.py index 33b627236..ee5c93994 100755 --- a/artiq/frontend/artiq_flash.py +++ b/artiq/frontend/artiq_flash.py @@ -6,7 +6,6 @@ import subprocess import tempfile import shutil import re -import io import atexit from functools import partial from collections import defaultdict @@ -279,7 +278,6 @@ def main(): "bootloader": ("spi1", 0x000000), "storage": ("spi1", 0x040000), "firmware": ("spi1", 0x050000), - "rtm_gateware": ("spi1", 0x150000), }, }[args.target] @@ -311,30 +309,18 @@ def main(): else: return os.path.join(args.srcbuild, *path_filename) - def convert_gateware(bit_filename, prefix_size=False): - bin_io = io.BytesIO() - with open(bit_filename, "rb") as bit_file: - bit2bin(bit_file, bin_io) - bin_data = bin_io.getvalue() - - bin_handle, bin_filename = tempfile.mkstemp( - prefix="artiq_", suffix="_" + os.path.basename(bit_filename)) - with open(bin_handle, "wb") as bin_file: - if prefix_size: - bin_file.write(len(bin_data).to_bytes(4, byteorder="big")) - bin_file.write(bin_data) - atexit.register(lambda: os.unlink(bin_filename)) - return bin_filename - try: for action in args.action: if action == "gateware": - gateware_bin = convert_gateware(artifact_path(variant, "gateware", "top.bit")) - programmer.write_binary(*config["gateware"], gateware_bin) + gateware_bin = artifact_path(variant, "gateware", "top.bin") + if not os.access(gateware_bin, os.R_OK): + bin_handle, gateware_bin = tempfile.mkstemp() + gateware_bit = artifact_path(variant, "gateware", "top.bit") + with open(gateware_bit, "rb") as bit_file, open(bin_handle, "wb") as bin_file: + bit2bin(bit_file, bin_file) + atexit.register(lambda: os.unlink(gateware_bin)) - if args.target == "sayma": - rtm_gateware_bin = convert_gateware(artifact_path("rtm_gateware", "top.bit")) - programmer.write_binary(*config["rtm_gateware"], rtm_gateware_bin) + programmer.write_binary(*config["gateware"], gateware_bin) elif action == "bootloader": bootloader_bin = artifact_path(variant, "software", "bootloader", "bootloader.bin") programmer.write_binary(*config["bootloader"], bootloader_bin)