forked from M-Labs/artiq
targets/kc705: fix e664fe3
This commit is contained in:
parent
e664fe38b0
commit
cb5fd08713
|
@ -196,8 +196,6 @@ class NIST_QC1(_NIST_QCx):
|
||||||
rtio_channels.append(rtio.Channel.from_phy(phy))
|
rtio_channels.append(rtio.Channel.from_phy(phy))
|
||||||
|
|
||||||
self.config["RTIO_DDS_CHANNEL"] = len(rtio_channels)
|
self.config["RTIO_DDS_CHANNEL"] = len(rtio_channels)
|
||||||
assert self.rtio.fine_ts_width <= 3
|
|
||||||
self.config["DDS_RTIO_CLK_RATIO"] = 8 >> self.rtio.fine_ts_width
|
|
||||||
self.config["DDS_CHANNEL_COUNT"] = 8
|
self.config["DDS_CHANNEL_COUNT"] = 8
|
||||||
self.config["DDS_AD9858"] = True
|
self.config["DDS_AD9858"] = True
|
||||||
phy = dds.AD9858(platform.request("dds"), 8)
|
phy = dds.AD9858(platform.request("dds"), 8)
|
||||||
|
@ -210,6 +208,8 @@ class NIST_QC1(_NIST_QCx):
|
||||||
rtio_channels.append(rtio.LogChannel())
|
rtio_channels.append(rtio.LogChannel())
|
||||||
|
|
||||||
self.add_rtio(rtio_channels)
|
self.add_rtio(rtio_channels)
|
||||||
|
assert self.rtio.fine_ts_width <= 3
|
||||||
|
self.config["DDS_RTIO_CLK_RATIO"] = 8 >> self.rtio.fine_ts_width
|
||||||
|
|
||||||
|
|
||||||
class NIST_QC2(_NIST_QCx):
|
class NIST_QC2(_NIST_QCx):
|
||||||
|
@ -246,8 +246,6 @@ class NIST_QC2(_NIST_QCx):
|
||||||
rtio_channels.append(rtio.Channel.from_phy(phy))
|
rtio_channels.append(rtio.Channel.from_phy(phy))
|
||||||
|
|
||||||
self.config["RTIO_DDS_CHANNEL"] = len(rtio_channels)
|
self.config["RTIO_DDS_CHANNEL"] = len(rtio_channels)
|
||||||
assert self.rtio.fine_ts_width <= 3
|
|
||||||
self.config["DDS_RTIO_CLK_RATIO"] = 24 >> self.rtio.fine_ts_width
|
|
||||||
self.config["DDS_CHANNEL_COUNT"] = 11
|
self.config["DDS_CHANNEL_COUNT"] = 11
|
||||||
self.config["DDS_AD9914"] = True
|
self.config["DDS_AD9914"] = True
|
||||||
self.config["DDS_ONEHOT_SEL"] = True
|
self.config["DDS_ONEHOT_SEL"] = True
|
||||||
|
@ -261,6 +259,8 @@ class NIST_QC2(_NIST_QCx):
|
||||||
rtio_channels.append(rtio.LogChannel())
|
rtio_channels.append(rtio.LogChannel())
|
||||||
|
|
||||||
self.add_rtio(rtio_channels)
|
self.add_rtio(rtio_channels)
|
||||||
|
assert self.rtio.fine_ts_width <= 3
|
||||||
|
self.config["DDS_RTIO_CLK_RATIO"] = 24 >> self.rtio.fine_ts_width
|
||||||
|
|
||||||
|
|
||||||
def main():
|
def main():
|
||||||
|
|
Loading…
Reference in New Issue