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doc: add core device comms details

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Sebastien Bourdeauducq 2016-06-11 10:01:15 -06:00
parent 3bd190e624
commit ca9724f517
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doc/manual/core_device.rst
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@ -24,6 +24,8 @@ This flash storage space can be accessed by using ``artiq_coreconfig`` (see: :re
FPGA board ports FPGA board ports
**************** ****************
All boards have a serial interface running at 115200bps 8-N-1 that can be used for debugging.
KC705 KC705
----- -----
@ -156,6 +158,8 @@ The low-cost Pipistrello FPGA board can be used as a lower-cost but slower alter
pppd /dev/ttyUSB1 115200 noauth nodetach local nocrtscts novj 10.0.0.1:10.0.0.2 pppd /dev/ttyUSB1 115200 noauth nodetach local nocrtscts novj 10.0.0.1:10.0.0.2
.. warning:: Windows is not supported.
When plugged to an adapter, the NIST QC1 hardware can be used. The TTL lines are mapped to RTIO channels as follows: When plugged to an adapter, the NIST QC1 hardware can be used. The TTL lines are mapped to RTIO channels as follows:
+--------------+------------+--------------+ +--------------+------------+--------------+