forked from M-Labs/artiq
ad9910: relax timing for faster spi clock
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@ -99,15 +99,15 @@ class AD9910:
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aux_dac = self.read32(_AD9910_REG_AUX_DAC)
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if aux_dac & 0xff != 0x7f:
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raise ValueError("Urukul AD9910 AUX_DAC mismatch")
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delay(10*us)
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delay(100*us)
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self.write32(_AD9910_REG_CFR2, 0x01400020)
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cfr3 = (0x0807c100 | (self.pll_vco << 24) |
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(self.pll_cp << 19) | (self.pll_n << 1))
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self.write32(_AD9910_REG_CFR3, cfr3 | 0x400) # PFD reset
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delay(10*us)
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delay(100*us)
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self.cpld.io_update.pulse(100*ns)
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self.write32(_AD9910_REG_CFR3, cfr3)
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delay(10*us)
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delay(100*us)
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self.cpld.io_update.pulse(100*ns)
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for i in range(100):
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lock = urukul_sta_pll_lock(self.cpld.sta_read())
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