forked from M-Labs/artiq
Merge branch 'master' of github.com:m-labs/artiq
This commit is contained in:
commit
c7d9bb7edd
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@ -123,9 +123,13 @@ then
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PROXY=bscan_spi_kc705.bit
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BIOS_ADDR=0xaf0000
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RUNTIME_ADDR=0xb00000
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RUNTIME_FILE=${MEZZANINE_BOARD}/runtime.fbi
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RUNTIME_FILE=runtime.fbi
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FS_ADDR=0xb40000
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if [ -z "$BIN_PREFIX" ]; then BIN_PREFIX=$ARTIQ_PREFIX/binaries/kc705; fi
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if [ -z "$BIN_PREFIX" ]
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then
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RUNTIME_FILE=${MEZZANINE_BOARD}/runtime.fbi
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BIN_PREFIX=$ARTIQ_PREFIX/binaries/kc705
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fi
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search_for_proxy $PROXY
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elif [ "$BOARD" == "pipistrello" ]
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then
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@ -1,6 +1,7 @@
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import unittest
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import asyncio
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import sys
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import os
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from time import time, sleep
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from artiq import *
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@ -63,7 +64,10 @@ _handlers = {
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class SchedulerCase(unittest.TestCase):
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def setUp(self):
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self.loop = asyncio.new_event_loop()
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if os.name == "nt":
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self.loop = asyncio.ProactorEventLoop()
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else:
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self.loop = asyncio.new_event_loop()
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asyncio.set_event_loop(self.loop)
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def test_steps(self):
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@ -1,6 +1,7 @@
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import unittest
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import asyncio
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import sys
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import os
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from time import sleep
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from artiq import *
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@ -59,7 +60,10 @@ def _run_experiment(class_name):
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class WatchdogCase(unittest.TestCase):
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def setUp(self):
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self.loop = asyncio.new_event_loop()
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if os.name == "nt":
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self.loop = asyncio.ProactorEventLoop()
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else:
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self.loop = asyncio.new_event_loop()
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asyncio.set_event_loop(self.loop)
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def test_watchdog_no_timeout(self):
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@ -42,7 +42,7 @@ cd $SRC_DIR/misoc; $PYTHON make.py -X ../soc -t artiq_pipistrello $MISOC_EXTRA_I
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cp soc/runtime/runtime.fbi $BIN_PREFIX/pipistrello/
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cp $SRC_DIR/misoc/software/bios/bios.bin $BIN_PREFIX/pipistrello/
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cp $SRC_DIR/misoc/build/artiq_pipistrello-nist_qc1-pipistrello.bit $BIN_PREFIX/pipistrello/
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wget http://www.phys.ethz.ch/~robertjo/bscan_spi_lx45_csg324.bit
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wget https://people.phys.ethz.ch/~robertjo/bscan_spi_lx45_csg324.bit
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mv bscan_spi_lx45_csg324.bit $BIN_PREFIX/pipistrello/
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# build for KC705 NIST_QC2
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@ -176,7 +176,7 @@ These steps are required to generate bitstream (``.bit``) files, build the MiSoC
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::
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$ cd ~/artiq-dev
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$ wget http://www.phys.ethz.ch/~robertjo/bscan_spi_lx45_csg324.bit
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$ wget https://people.phys.ethz.ch/~robertjo/bscan_spi_lx45_csg324.bit
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Then copy ``~/artiq-dev/bscan_spi_lx45_csg324.bit`` to ``~/.migen``, ``/usr/local/share/migen`` or ``/usr/share/migen``.
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