coredevice/TTLOut: add dummy output function

artiq/coredevice/ttl.py

@@ -37,6 +37,10 @@ class TTLOut:
         # in RTIO cycles
         self.o_previous_timestamp = int(0, width=64)
 
+    @kernel
+    def output(self):
+        pass
+
     @kernel
     def set_o(self, o):
         ttl_set_o(now_mu(), self.channel, o)

artiq/test/coredevice/test_rtio.py

@@ -8,6 +8,7 @@ from math import sqrt
 from artiq.experiment import *
 from artiq.test.hardware_testbench import ExperimentCase
 
+
 artiq_low_latency = os.getenv("ARTIQ_LOW_LATENCY")