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err out on tune_fifo_offset

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Robert Jördens 2022-09-05 20:48:15 +00:00
parent 1cc57e2345
commit c26fa5eb90
1 changed files with 2 additions and 0 deletions
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2
artiq/coredevice/phaser.py
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@ -791,6 +791,8 @@ class Phaser:
if good & (1 << o): if good & (1 << o):
sum += o sum += o
count += 1 count += 1
if count == 0:
raise ValueError("no good fifo offset")
best = ((sum // count) + offset) % 8 best = ((sum // count) + offset) % 8
self.dac_write(0x09, (config9 & 0x1fff) | (best << 13)) self.dac_write(0x09, (config9 & 0x1fff) | (best << 13))
return best return best