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drtio/gth_ultrascale: disable IBUFDS_GTE3 until stable_clkin 

Precaution against HMC7043 noise issues.
This commit is contained in:
Sebastien Bourdeauducq 2018-06-21 22:56:05 +08:00
parent 8b3c12e6eb
commit c1db02a351
1 changed files with 6 additions and 3 deletions
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9
artiq/gateware/drtio/transceiver/gth_ultrascale.py
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@ -637,8 +637,9 @@ class GTH(Module, TransceiverInterface):
# # # # # #
refclk = Signal() refclk = Signal()
ibufds_ceb = Signal()
self.specials += Instance("IBUFDS_GTE3", self.specials += Instance("IBUFDS_GTE3",
i_CEB=0, i_CEB=ibufds_ceb,
i_I=clock_pads.p, i_I=clock_pads.p,
i_IB=clock_pads.n, i_IB=clock_pads.n,
o_O=refclk) o_O=refclk)
@ -664,8 +665,10 @@ class GTH(Module, TransceiverInterface):
self.submodules.tx_phase_alignment = GTHTXPhaseAlignement(self.gths) self.submodules.tx_phase_alignment = GTHTXPhaseAlignement(self.gths)
TransceiverInterface.__init__(self, channel_interfaces) TransceiverInterface.__init__(self, channel_interfaces)
# GTH PLLs recover on their own from an interrupted clock input. # GTH PLLs recover on their own from an interrupted clock input,
# stable_clkin can be ignored. # but be paranoid about HMC7043 noise.
self.stable_clkin.storage.attr.add("no_retiming")
self.comb += ibufds_ceb.eq(~self.stable_clkin.storage)
self.comb += [ self.comb += [
self.cd_rtio.clk.eq(self.gths[master].cd_rtio_tx.clk), self.cd_rtio.clk.eq(self.gths[master].cd_rtio_tx.clk),