forked from M-Labs/artiq
urukul: do IO_RST also when blind
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@ -190,7 +190,9 @@ class CPLD:
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cfg = self.cfg_reg
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cfg = self.cfg_reg
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# Don't pulse MASTER_RESET (m-labs/artiq#940)
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# Don't pulse MASTER_RESET (m-labs/artiq#940)
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self.cfg_reg = cfg | (0 << CFG_RST) | (1 << CFG_IO_RST)
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self.cfg_reg = cfg | (0 << CFG_RST) | (1 << CFG_IO_RST)
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if not blind:
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if blind:
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self.cfg_write(self.cfg_reg)
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else:
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proto_rev = urukul_sta_proto_rev(self.sta_read())
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proto_rev = urukul_sta_proto_rev(self.sta_read())
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if proto_rev != STA_PROTO_REV_MATCH:
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if proto_rev != STA_PROTO_REV_MATCH:
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raise ValueError("Urukul proto_rev mismatch")
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raise ValueError("Urukul proto_rev mismatch")
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