diff --git a/artiq/examples/kasli_basic/device_db_berkeley.py b/artiq/examples/kasli_basic/device_db_berkeley.py new file mode 100644 index 000000000..3f53550f6 --- /dev/null +++ b/artiq/examples/kasli_basic/device_db_berkeley.py @@ -0,0 +1,234 @@ +core_addr = "kasli-1.lab.m-labs.hk" + +device_db = { + "core": { + "type": "local", + "module": "artiq.coredevice.core", + "class": "Core", + "arguments": {"host": core_addr, "ref_period": 1e-9} + }, + "core_log": { + "type": "controller", + "host": "::1", + "port": 1068, + "command": "aqctl_corelog -p {port} --bind {bind} " + core_addr + }, + "core_cache": { + "type": "local", + "module": "artiq.coredevice.cache", + "class": "CoreCache" + }, + "core_dma": { + "type": "local", + "module": "artiq.coredevice.dma", + "class": "CoreDMA" + }, + + "i2c_switch0": { + "type": "local", + "module": "artiq.coredevice.i2c", + "class": "PCA9548", + "arguments": {"address": 0xe0} + }, + "i2c_switch1": { + "type": "local", + "module": "artiq.coredevice.i2c", + "class": "PCA9548", + "arguments": {"address": 0xe2} + }, +} + + +device_db.update({ + "ttl" + str(i): { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLInOut" if i < 4 else "TTLOut", + "arguments": {"channel": i}, + } for i in range(16) +}) + + +for j in range(3): + device_db.update({ + "spi_urukul{}".format(j): { + "type": "local", + "module": "artiq.coredevice.spi2", + "class": "SPIMaster", + "arguments": {"channel": 16 + 7*j} + }, + "ttl_urukul{}_sync".format(j): { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLClockGen", + "arguments": {"channel": 17 + 7*j, "acc_width": 4} + }, + "ttl_urukul{}_io_update".format(j): { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 18 + 7*j} + }, + "ttl_urukul{}_sw0".format(j): { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 19 + 7*j} + }, + "ttl_urukul{}_sw1".format(j): { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 20 + 7*j} + }, + "ttl_urukul{}_sw2".format(j): { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 21 + 7*j} + }, + "ttl_urukul{}_sw3".format(j): { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 22 + 7*j} + }, + "urukul{}_cpld".format(j): { + "type": "local", + "module": "artiq.coredevice.urukul", + "class": "CPLD", + "arguments": { + "spi_device": "spi_urukul{}".format(j), + "sync_device": "ttl_urukul{}_sync".format(j), + "io_update_device": "ttl_urukul{}_io_update".format(j), + "refclk": 125e6, + "clk_sel": 2 + } + } + }) + + device_db.update({ + "urukul{}_ch{}".format(j, i): { + "type": "local", + "module": "artiq.coredevice.ad9910", + "class": "AD9910", + "arguments": { + "pll_n": 32, + "chip_select": 4 + i, + "cpld_device": "urukul{}_cpld".format(j), + "sw_device": "ttl_urukul{}_sw{}".format(j, i) + } + } for i in range(4) + }) + + +device_db.update( + spi_urukul3={ + "type": "local", + "module": "artiq.coredevice.spi2", + "class": "SPIMaster", + "arguments": {"channel": 37} + }, + ttl_urukul3_io_update={ + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 38} + }, + ttl_urukul3_sw0={ + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 39} + }, + ttl_urukul3_sw1={ + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 40} + }, + ttl_urukul3_sw2={ + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 41} + }, + ttl_urukul3_sw3={ + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 42} + }, + urukul3_cpld={ + "type": "local", + "module": "artiq.coredevice.urukul", + "class": "CPLD", + "arguments": { + "spi_device": "spi_urukul3", + "io_update_device": "ttl_urukul3_io_update", + "refclk": 125e6, + "clk_sel": 0 + } + } +) + +for i in range(4): + device_db["urukul3_ch" + str(i)] = { + "type": "local", + "module": "artiq.coredevice.ad9912", + "class": "AD9912", + "arguments": { + "pll_n": 8, + "chip_select": 4 + i, + "cpld_device": "urukul3_cpld", + "sw_device": "ttl_urukul3_sw" + str(i) + } + } + + +device_db.update({ + "spi_zotino0": { + "type": "local", + "module": "artiq.coredevice.spi2", + "class": "SPIMaster", + "arguments": {"channel": 43} + }, + "ttl_zotino0_ldac": { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 44} + }, + "ttl_zotino0_clr": { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 45} + }, + "zotino0": { + "type": "local", + "module": "artiq.coredevice.zotino", + "class": "Zotino", + "arguments": { + "spi_device": "spi_zotino0", + "ldac_device": "ttl_zotino0_ldac", + "clr_device": "ttl_zotino0_clr" + } + } +}) + + +device_db.update({ + "led0": { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 46} + }, + "led1": { + "type": "local", + "module": "artiq.coredevice.ttl", + "class": "TTLOut", + "arguments": {"channel": 47} + } +}) diff --git a/artiq/gateware/targets/kasli.py b/artiq/gateware/targets/kasli.py index 966a5f44c..3fee013ba 100755 --- a/artiq/gateware/targets/kasli.py +++ b/artiq/gateware/targets/kasli.py @@ -533,6 +533,45 @@ class NUDT(_StandaloneBase): self.add_rtio(self.rtio_channels) +class Berkeley(_StandaloneBase): + def __init__(self, hw_rev=None, **kwargs): + if hw_rev is None: + hw_rev = "v1.1" + _StandaloneBase.__init__(self, hw_rev=hw_rev, **kwargs) + + self.config["SI5324_AS_SYNTHESIZER"] = None + # self.config["SI5324_EXT_REF"] = None + self.config["RTIO_FREQUENCY"] = "125.0" + if hw_rev == "v1.0": + # EEM clock fan-out from Si5324, not MMCX + self.comb += self.platform.request("clk_sel").eq(1) + + self.rtio_channels = [] + eem.DIO.add_std(self, 0, + ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X) + eem.DIO.add_std(self, 1, + ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X) + eem.Urukul.add_std(self, 2, 3, ttl_serdes_7series.Output_8X, + ttl_simple.ClockGen) + eem.Urukul.add_std(self, 4, 5, ttl_serdes_7series.Output_8X, + ttl_simple.ClockGen) + eem.Urukul.add_std(self, 6, 7, ttl_serdes_7series.Output_8X, + ttl_simple.ClockGen) + eem.Urukul.add_std(self, 9, 8, ttl_serdes_7series.Output_8X) + eem.Zotino.add_std(self, 10, ttl_serdes_7series.Output_8X) + + for i in (1, 2): + sfp_ctl = self.platform.request("sfp_ctl", i) + phy = ttl_simple.Output(sfp_ctl.led) + self.submodules += phy + self.rtio_channels.append(rtio.Channel.from_phy(phy)) + + self.config["HAS_RTIO_LOG"] = None + self.config["RTIO_LOG_CHANNEL"] = len(self.rtio_channels) + self.rtio_channels.append(rtio.LogChannel()) + self.add_rtio(self.rtio_channels) + + class PTB(_StandaloneBase): """PTB Kasli variant @@ -1193,7 +1232,7 @@ class VLBAISatellite(_SatelliteBase): VARIANTS = {cls.__name__.lower(): cls for cls in [ Opticlock, SUServo, PTB, PTB2, HUB, LUH, - SYSU, MITLL, MITLL2, USTC, Tsinghua, Tsinghua2, WIPM, NUDT, + SYSU, MITLL, MITLL2, USTC, Tsinghua, Tsinghua2, WIPM, NUDT, Berkeley, VLBAIMaster, VLBAISatellite, Tester, Master, Satellite]}