From bcb030cc9ca272578c88a5a2270a660debe1e645 Mon Sep 17 00:00:00 2001 From: pca006132 Date: Thu, 3 Jun 2021 14:06:17 +0800 Subject: [PATCH] aqctl_corelog: fix endianness issue (closes #1682) (#1689) Fixed according to https://forum.m-labs.hk/d/190-fetchingreading-the-core-log-in-a-central-location/10 Tested with both KC705 and ZC706. --- artiq/frontend/aqctl_corelog.py | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/artiq/frontend/aqctl_corelog.py b/artiq/frontend/aqctl_corelog.py index b0b396efd..95bbfe023 100755 --- a/artiq/frontend/aqctl_corelog.py +++ b/artiq/frontend/aqctl_corelog.py @@ -39,11 +39,18 @@ async def get_logs_sim(host): async def get_logs(host): reader, writer = await asyncio.open_connection(host, 1380) writer.write(b"ARTIQ management\n") + endian = await reader.readexactly(1) + if endian == b"e": + endian = "<" + elif endian == b"E": + endian = ">" + else: + raise IOError("Incorrect reply from device: expected e/E.") writer.write(struct.pack("B", Request.PullLog.value)) await writer.drain() while True: - length, = struct.unpack(">l", await reader.readexactly(4)) + length, = struct.unpack(endian + "l", await reader.readexactly(4)) log = await reader.readexactly(length) for line in log.decode("utf-8").splitlines():