From bbe36b94f7da6244a473349221ca35eb2dacfe0d Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Mon, 6 Aug 2018 19:02:27 +0800
Subject: [PATCH] ad9154: enable sync in init

---
 artiq/firmware/libboard_artiq/ad9154.rs | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/artiq/firmware/libboard_artiq/ad9154.rs b/artiq/firmware/libboard_artiq/ad9154.rs
index a1c384da9..c210301fd 100644
--- a/artiq/firmware/libboard_artiq/ad9154.rs
+++ b/artiq/firmware/libboard_artiq/ad9154.rs
@@ -370,6 +370,11 @@ fn dac_setup(dacno: u8, linerate: u64) -> Result<(), &'static str> {
     write(ad9154_reg::LMFC_VAR_0, 0x0a); // receive buffer delay
     write(ad9154_reg::LMFC_VAR_1, 0x0a);
     write(ad9154_reg::SYNC_ERRWINDOW, 0); // +- 1/2 DAC clock
+    // datasheet seems to say ENABLE and ARM should be separate steps,
+    // so enable now so it can be armed in dac_sync().
+    write(ad9154_reg::SYNC_CONTROL,
+        0x1*ad9154_reg::SYNCMODE | 1*ad9154_reg::SYNCENABLE |
+        0*ad9154_reg::SYNCARM | 0*ad9154_reg::SYNCCLRSTKY);
 
     write(ad9154_reg::XBAR_LN_0_1,
             0*ad9154_reg::LOGICAL_LANE0_SRC | 1*ad9154_reg::LOGICAL_LANE1_SRC);