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jesd204sync: improve messaging

This commit is contained in:
Sebastien Bourdeauducq 2019-01-28 18:08:20 +08:00
parent 3acee87df2
commit ba21dc8498
1 changed files with 11 additions and 5 deletions
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10
artiq/firmware/libboard_artiq/jesd204sync.rs
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@ -187,6 +187,7 @@ fn reach_sysref_ddmtd_target(target: i32, tolerance: i32) -> Result<(), &'static
} }
fn calibrate_sysref_target(rising_average: i32, falling_average: i32) -> Result<i32, &'static str> { fn calibrate_sysref_target(rising_average: i32, falling_average: i32) -> Result<i32, &'static str> {
info!("calibrating SYSREF DDMTD target phase...");
let coarse_target = let coarse_target =
if rising_average < falling_average { if rising_average < falling_average {
(rising_average + falling_average)/2 (rising_average + falling_average)/2
@ -196,7 +197,7 @@ fn calibrate_sysref_target(rising_average: i32, falling_average: i32) -> Result<
info!(" SYSREF calibration coarse target: {}", coarse_target); info!(" SYSREF calibration coarse target: {}", coarse_target);
reach_sysref_ddmtd_target(coarse_target, 4)?; reach_sysref_ddmtd_target(coarse_target, 4)?;
let target = measure_ddmdt_phase(); let target = measure_ddmdt_phase();
info!("SYSREF calibrated target: {}", target); info!(" ...done, target={}", target);
Ok(target) Ok(target)
} }
@ -215,13 +216,14 @@ fn sysref_slip_rtio_cycle() {
} }
pub fn sysref_rtio_align() -> Result<(), &'static str> { pub fn sysref_rtio_align() -> Result<(), &'static str> {
info!("aligning SYSREF with RTIO TSC...");
let mut previous_sample = sysref_get_sample()?; let mut previous_sample = sysref_get_sample()?;
let mut nslips = 0; let mut nslips = 0;
loop { loop {
sysref_slip_rtio_cycle(); sysref_slip_rtio_cycle();
let sample = sysref_get_sample()?; let sample = sysref_get_sample()?;
if sample && !previous_sample { if sample && !previous_sample {
info!("SYSREF aligned with RTIO TSC"); info!(" ...done");
return Ok(()) return Ok(())
} }
previous_sample = sample; previous_sample = sample;
@ -238,6 +240,7 @@ pub fn sysref_auto_rtio_align() -> Result<(), &'static str> {
test_ddmtd_stability(false, 1)?; test_ddmtd_stability(false, 1)?;
test_slip_ddmtd()?; test_slip_ddmtd()?;
info!("determining SYSREF S/H limits...");
let sysref_sh_limits = measure_sysref_sh_limits()?; let sysref_sh_limits = measure_sysref_sh_limits()?;
let rising_average = average_phases(&sysref_sh_limits.rising_phases, SYSREF_SH_MOD); let rising_average = average_phases(&sysref_sh_limits.rising_phases, SYSREF_SH_MOD);
let falling_average = average_phases(&sysref_sh_limits.falling_phases, SYSREF_SH_MOD); let falling_average = average_phases(&sysref_sh_limits.falling_phases, SYSREF_SH_MOD);
@ -254,6 +257,7 @@ pub fn sysref_auto_rtio_align() -> Result<(), &'static str> {
if rising_max_deviation > 4 || falling_max_deviation > 4 { if rising_max_deviation > 4 || falling_max_deviation > 4 {
return Err("excessive SYSREF S/H limit deviation"); return Err("excessive SYSREF S/H limit deviation");
} }
info!(" ...done");
let entry = config::read_str("sysref_ddmtd_phase_fpga", |r| r.map(|s| s.parse())); let entry = config::read_str("sysref_ddmtd_phase_fpga", |r| r.map(|s| s.parse()));
let target_phase = match entry { let target_phase = match entry {
@ -270,10 +274,12 @@ pub fn sysref_auto_rtio_align() -> Result<(), &'static str> {
} }
}; };
info!("aligning SYSREF with RTIO clock...");
reach_sysref_ddmtd_target(target_phase, 3)?; reach_sysref_ddmtd_target(target_phase, 3)?;
if sysref_sh_error() { if sysref_sh_error() {
return Err("SYSREF does not meet S/H timing at DDMTD phase target"); return Err("SYSREF does not meet S/H timing at DDMTD phase target");
} }
info!(" ...done");
sysref_rtio_align()?; sysref_rtio_align()?;